From 421bfd274b5cb1590fd8efe0b0da12973b428938 Mon Sep 17 00:00:00 2001 From: Paul Floyd Date: Sat, 24 Feb 2024 13:57:58 +0100 Subject: [PATCH] linux arm64: fix a couple of clang warnings about word length --- coregrind/m_debuglog.c | 2 +- coregrind/m_libcproc.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/coregrind/m_debuglog.c b/coregrind/m_debuglog.c index fd6db4beb..e4ab846f5 100644 --- a/coregrind/m_debuglog.c +++ b/coregrind/m_debuglog.c @@ -300,7 +300,7 @@ static UInt local_sys_write_stderr ( const HChar* buf, Int n ) static UInt local_sys_getpid ( void ) { - UInt __res; + ULong __res; __asm__ volatile ( "mov x8, #"VG_STRINGIFY(__NR_getpid)"\n" "svc 0x0\n" /* getpid() */ diff --git a/coregrind/m_libcproc.c b/coregrind/m_libcproc.c index 592d69bf1..02f636748 100644 --- a/coregrind/m_libcproc.c +++ b/coregrind/m_libcproc.c @@ -1332,11 +1332,12 @@ void VG_(invalidate_icache) ( void *ptr, SizeT nbytes ) */ // Ask what the I and D line sizes are - UInt cache_type_register; + ULong read_mrs; // Copy the content of the cache type register to a core register. __asm__ __volatile__ ("mrs %[ctr], ctr_el0" // NOLINT - : [ctr] "=r" (cache_type_register)); + : [ctr] "=r" (read_mrs)); + UInt cache_type_register = read_mrs; const Int kDCacheLineSizeShift = 16; const Int kICacheLineSizeShift = 0; const UInt kDCacheLineSizeMask = 0xf << kDCacheLineSizeShift; -- 2.11.4.GIT