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[PATCH] sem2mutex: sound/oss/
[usb.git] / sound / oss / sonicvibes.c
blob69a4b8778b5130cf03bb6cbec900beec06afa337
1 /*****************************************************************************/
2
3 /*
4 * sonicvibes.c -- S3 Sonic Vibes audio driver.
5 *
6 * Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Special thanks to David C. Niemi
23 *
24 *
25 * Module command line parameters:
26 * none so far
27 *
28 *
29 * Supported devices:
30 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
31 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
32 * /dev/midi simple MIDI UART interface, no ioctl
33 *
34 * The card has both an FM and a Wavetable synth, but I have to figure
35 * out first how to drive them...
36 *
37 * Revision history
38 * 06.05.1998 0.1 Initial release
39 * 10.05.1998 0.2 Fixed many bugs, esp. ADC rate calculation
40 * First stab at a simple midi interface (no bells&whistles)
41 * 13.05.1998 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
42 * set_dac_rate in the FMODE_WRITE case in sv_open
43 * Fix hwptr out of bounds (now mpg123 works)
44 * 14.05.1998 0.4 Don't allow excessive interrupt rates
45 * 08.06.1998 0.5 First release using Alan Cox' soundcore instead of miscdevice
46 * 03.08.1998 0.6 Do not include modversions.h
47 * Now mixer behaviour can basically be selected between
48 * "OSS documented" and "OSS actual" behaviour
49 * 31.08.1998 0.7 Fix realplayer problems - dac.count issues
50 * 10.12.1998 0.8 Fix drain_dac trying to wait on not yet initialized DMA
51 * 16.12.1998 0.9 Fix a few f_file & FMODE_ bugs
52 * 06.01.1999 0.10 remove the silly SA_INTERRUPT flag.
53 * hopefully killed the egcs section type conflict
54 * 12.03.1999 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
55 * reported by Johan Maes <joma@telindus.be>
56 * 22.03.1999 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
57 * read/write cannot be executed
58 * 05.04.1999 0.13 added code to sv_read and sv_write which should detect
59 * lockups of the sound chip and revive it. This is basically
60 * an ugly hack, but at least applications using this driver
61 * won't hang forever. I don't know why these lockups happen,
62 * it might well be the motherboard chipset (an early 486 PCI
63 * board with ALI chipset), since every busmastering 100MB
64 * ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
65 * exhibit similar behaviour (they work for a couple of packets
66 * and then lock up and can be revived by ifconfig down/up).
67 * 07.04.1999 0.14 implemented the following ioctl's: SOUND_PCM_READ_RATE,
68 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
69 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
70 * Note: dmaio hack might still be wrong on archs other than i386
71 * 15.06.1999 0.15 Fix bad allocation bug.
72 * Thanks to Deti Fliegl <fliegl@in.tum.de>
73 * 28.06.1999 0.16 Add pci_set_master
74 * 03.08.1999 0.17 adapt to Linus' new __setup/__initcall
75 * added kernel command line options "sonicvibes=reverb" and "sonicvibesdmaio=dmaioaddr"
76 * 12.08.1999 0.18 module_init/__setup fixes
77 * 24.08.1999 0.19 get rid of the dmaio kludge, replace with allocate_resource
78 * 31.08.1999 0.20 add spin_lock_init
79 * use new resource allocation to allocate DDMA IO space
80 * replaced current->state = x with set_current_state(x)
81 * 03.09.1999 0.21 change read semantics for MIDI to match
82 * OSS more closely; remove possible wakeup race
83 * 28.10.1999 0.22 More waitqueue races fixed
84 * 01.12.1999 0.23 New argument to allocate_resource
85 * 07.12.1999 0.24 More allocate_resource semantics change
86 * 08.01.2000 0.25 Prevent some ioctl's from returning bad count values on underrun/overrun;
87 * Tim Janik's BSE (Bedevilled Sound Engine) found this
88 * use Martin Mares' pci_assign_resource
89 * 07.02.2000 0.26 Use pci_alloc_consistent and pci_register_driver
90 * 21.11.2000 0.27 Initialize dma buffers in poll, otherwise poll may return a bogus mask
91 * 12.12.2000 0.28 More dma buffer initializations, patch from
92 * Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
93 * 31.01.2001 0.29 Register/Unregister gameport
94 * Fix SETTRIGGER non OSS API conformity
95 * 18.05.2001 0.30 PCI probing and error values cleaned up by Marcus
96 * Meissner <mm@caldera.de>
97 * 03.01.2003 0.31 open_mode fixes from Georg Acher <acher@in.tum.de>
98 *
99 */
100
101 /*****************************************************************************/
102
103 #include <linux/module.h>
104 #include <linux/string.h>
105 #include <linux/ioport.h>
106 #include <linux/interrupt.h>
107 #include <linux/wait.h>
108 #include <linux/mm.h>
109 #include <linux/delay.h>
110 #include <linux/sound.h>
111 #include <linux/slab.h>
112 #include <linux/soundcard.h>
113 #include <linux/pci.h>
114 #include <linux/init.h>
115 #include <linux/poll.h>
116 #include <linux/spinlock.h>
117 #include <linux/smp_lock.h>
118 #include <linux/gameport.h>
119 #include <linux/mutex.h>
120
121
122 #include <asm/io.h>
123 #include <asm/uaccess.h>
124
125 #include "dm.h"
126
127 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
128 #define SUPPORT_JOYSTICK 1
129 #endif
130
131 /* --------------------------------------------------------------------- */
132
133 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
134
135 /* --------------------------------------------------------------------- */
136
137 #ifndef PCI_VENDOR_ID_S3
138 #define PCI_VENDOR_ID_S3 0x5333
139 #endif
140 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
141 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
142 #endif
143
144 #define SV_MAGIC ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
145
146 #define SV_EXTENT_SB 0x10
147 #define SV_EXTENT_ENH 0x10
148 #define SV_EXTENT_SYNTH 0x4
149 #define SV_EXTENT_MIDI 0x4
150 #define SV_EXTENT_GAME 0x8
151 #define SV_EXTENT_DMA 0x10
152
153 /*
154 * we are not a bridge and thus use a resource for DDMA that is used for bridges but
155 * left empty for normal devices
156 */
157 #define RESOURCE_SB 0
158 #define RESOURCE_ENH 1
159 #define RESOURCE_SYNTH 2
160 #define RESOURCE_MIDI 3
161 #define RESOURCE_GAME 4
162 #define RESOURCE_DDMA 7
163
164 #define SV_MIDI_DATA 0
165 #define SV_MIDI_COMMAND 1
166 #define SV_MIDI_STATUS 1
167
168 #define SV_DMA_ADDR0 0
169 #define SV_DMA_ADDR1 1
170 #define SV_DMA_ADDR2 2
171 #define SV_DMA_ADDR3 3
172 #define SV_DMA_COUNT0 4
173 #define SV_DMA_COUNT1 5
174 #define SV_DMA_COUNT2 6
175 #define SV_DMA_MODE 0xb
176 #define SV_DMA_RESET 0xd
177 #define SV_DMA_MASK 0xf
178
179 /*
180 * DONT reset the DMA controllers unless you understand
181 * the reset semantics. Assuming reset semantics as in
182 * the 8237 does not work.
183 */
184
185 #define DMA_MODE_AUTOINIT 0x10
186 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
187 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
188
189 #define SV_CODEC_CONTROL 0
190 #define SV_CODEC_INTMASK 1
191 #define SV_CODEC_STATUS 2
192 #define SV_CODEC_IADDR 4
193 #define SV_CODEC_IDATA 5
194
195 #define SV_CCTRL_RESET 0x80
196 #define SV_CCTRL_INTADRIVE 0x20
197 #define SV_CCTRL_WAVETABLE 0x08
198 #define SV_CCTRL_REVERB 0x04
199 #define SV_CCTRL_ENHANCED 0x01
200
201 #define SV_CINTMASK_DMAA 0x01
202 #define SV_CINTMASK_DMAC 0x04
203 #define SV_CINTMASK_SPECIAL 0x08
204 #define SV_CINTMASK_UPDOWN 0x40
205 #define SV_CINTMASK_MIDI 0x80
206
207 #define SV_CSTAT_DMAA 0x01
208 #define SV_CSTAT_DMAC 0x04
209 #define SV_CSTAT_SPECIAL 0x08
210 #define SV_CSTAT_UPDOWN 0x40
211 #define SV_CSTAT_MIDI 0x80
212
213 #define SV_CIADDR_TRD 0x80
214 #define SV_CIADDR_MCE 0x40
215
216 /* codec indirect registers */
217 #define SV_CIMIX_ADCINL 0x00
218 #define SV_CIMIX_ADCINR 0x01
219 #define SV_CIMIX_AUX1INL 0x02
220 #define SV_CIMIX_AUX1INR 0x03
221 #define SV_CIMIX_CDINL 0x04
222 #define SV_CIMIX_CDINR 0x05
223 #define SV_CIMIX_LINEINL 0x06
224 #define SV_CIMIX_LINEINR 0x07
225 #define SV_CIMIX_MICIN 0x08
226 #define SV_CIMIX_SYNTHINL 0x0A
227 #define SV_CIMIX_SYNTHINR 0x0B
228 #define SV_CIMIX_AUX2INL 0x0C
229 #define SV_CIMIX_AUX2INR 0x0D
230 #define SV_CIMIX_ANALOGINL 0x0E
231 #define SV_CIMIX_ANALOGINR 0x0F
232 #define SV_CIMIX_PCMINL 0x10
233 #define SV_CIMIX_PCMINR 0x11
234
235 #define SV_CIGAMECONTROL 0x09
236 #define SV_CIDATAFMT 0x12
237 #define SV_CIENABLE 0x13
238 #define SV_CIUPDOWN 0x14
239 #define SV_CIREVISION 0x15
240 #define SV_CIADCOUTPUT 0x16
241 #define SV_CIDMAABASECOUNT1 0x18
242 #define SV_CIDMAABASECOUNT0 0x19
243 #define SV_CIDMACBASECOUNT1 0x1c
244 #define SV_CIDMACBASECOUNT0 0x1d
245 #define SV_CIPCMSR0 0x1e
246 #define SV_CIPCMSR1 0x1f
247 #define SV_CISYNTHSR0 0x20
248 #define SV_CISYNTHSR1 0x21
249 #define SV_CIADCCLKSOURCE 0x22
250 #define SV_CIADCALTSR 0x23
251 #define SV_CIADCPLLM 0x24
252 #define SV_CIADCPLLN 0x25
253 #define SV_CISYNTHPLLM 0x26
254 #define SV_CISYNTHPLLN 0x27
255 #define SV_CIUARTCONTROL 0x2a
256 #define SV_CIDRIVECONTROL 0x2b
257 #define SV_CISRSSPACE 0x2c
258 #define SV_CISRSCENTER 0x2d
259 #define SV_CIWAVETABLESRC 0x2e
260 #define SV_CIANALOGPWRDOWN 0x30
261 #define SV_CIDIGITALPWRDOWN 0x31
262
263
264 #define SV_CIMIX_ADCSRC_CD 0x20
265 #define SV_CIMIX_ADCSRC_DAC 0x40
266 #define SV_CIMIX_ADCSRC_AUX2 0x60
267 #define SV_CIMIX_ADCSRC_LINE 0x80
268 #define SV_CIMIX_ADCSRC_AUX1 0xa0
269 #define SV_CIMIX_ADCSRC_MIC 0xc0
270 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
271 #define SV_CIMIX_ADCSRC_MASK 0xe0
272
273 #define SV_CFMT_STEREO 0x01
274 #define SV_CFMT_16BIT 0x02
275 #define SV_CFMT_MASK 0x03
276 #define SV_CFMT_ASHIFT 0
277 #define SV_CFMT_CSHIFT 4
278
279 static const unsigned sample_size[] = { 1, 2, 2, 4 };
280 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
281
282 #define SV_CENABLE_PPE 0x4
283 #define SV_CENABLE_RE 0x2
284 #define SV_CENABLE_PE 0x1
285
286
287 /* MIDI buffer sizes */
288
289 #define MIDIINBUF 256
290 #define MIDIOUTBUF 256
291
292 #define FMODE_MIDI_SHIFT 2
293 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
294 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
295
296 #define FMODE_DMFM 0x10
297
298 /* --------------------------------------------------------------------- */
299
300 struct sv_state {
301 /* magic */
302 unsigned int magic;
303
304 /* list of sonicvibes devices */
305 struct list_head devs;
306
307 /* the corresponding pci_dev structure */
308 struct pci_dev *dev;
309
310 /* soundcore stuff */
311 int dev_audio;
312 int dev_mixer;
313 int dev_midi;
314 int dev_dmfm;
315
316 /* hardware resources */
317 unsigned long iosb, ioenh, iosynth, iomidi; /* long for SPARC */
318 unsigned int iodmaa, iodmac, irq;
319
320 /* mixer stuff */
321 struct {
322 unsigned int modcnt;
323 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
324 unsigned short vol[13];
325 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
326 } mix;
327
328 /* wave stuff */
329 unsigned int rateadc, ratedac;
330 unsigned char fmt, enable;
331
332 spinlock_t lock;
333 struct mutex open_mutex;
334 mode_t open_mode;
335 wait_queue_head_t open_wait;
336
337 struct dmabuf {
338 void *rawbuf;
339 dma_addr_t dmaaddr;
340 unsigned buforder;
341 unsigned numfrag;
342 unsigned fragshift;
343 unsigned hwptr, swptr;
344 unsigned total_bytes;
345 int count;
346 unsigned error; /* over/underrun */
347 wait_queue_head_t wait;
348 /* redundant, but makes calculations easier */
349 unsigned fragsize;
350 unsigned dmasize;
351 unsigned fragsamples;
352 /* OSS stuff */
353 unsigned mapped:1;
354 unsigned ready:1;
355 unsigned endcleared:1;
356 unsigned enabled:1;
357 unsigned ossfragshift;
358 int ossmaxfrags;
359 unsigned subdivision;
360 } dma_dac, dma_adc;
361
362 /* midi stuff */
363 struct {
364 unsigned ird, iwr, icnt;
365 unsigned ord, owr, ocnt;
366 wait_queue_head_t iwait;
367 wait_queue_head_t owait;
368 struct timer_list timer;
369 unsigned char ibuf[MIDIINBUF];
370 unsigned char obuf[MIDIOUTBUF];
371 } midi;
372
373 #if SUPPORT_JOYSTICK
374 struct gameport *gameport;
375 #endif
376 };
377
378 /* --------------------------------------------------------------------- */
379
380 static LIST_HEAD(devs);
381 static unsigned long wavetable_mem;
382
383 /* --------------------------------------------------------------------- */
384
385 static inline unsigned ld2(unsigned int x)
386 {
387 unsigned r = 0;
388
389 if (x >= 0x10000) {
390 x >>= 16;
391 r += 16;
392 }
393 if (x >= 0x100) {
394 x >>= 8;
395 r += 8;
396 }
397 if (x >= 0x10) {
398 x >>= 4;
399 r += 4;
400 }
401 if (x >= 4) {
402 x >>= 2;
403 r += 2;
404 }
405 if (x >= 2)
406 r++;
407 return r;
408 }
409
410 /*
411 * hweightN: returns the hamming weight (i.e. the number
412 * of bits set) of a N-bit word
413 */
414
415 #ifdef hweight32
416 #undef hweight32
417 #endif
418
419 static inline unsigned int hweight32(unsigned int w)
420 {
421 unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
422 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
423 res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
424 res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
425 return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
426 }
427
428 /* --------------------------------------------------------------------- */
429
430 /*
431 * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
432 */
433
434 #undef DMABYTEIO
435
436 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
437 {
438 #ifdef DMABYTEIO
439 unsigned io = s->iodmaa, u;
440
441 count--;
442 for (u = 4; u > 0; u--, addr >>= 8, io++)
443 outb(addr & 0xff, io);
444 for (u = 3; u > 0; u--, count >>= 8, io++)
445 outb(count & 0xff, io);
446 #else /* DMABYTEIO */
447 count--;
448 outl(addr, s->iodmaa + SV_DMA_ADDR0);
449 outl(count, s->iodmaa + SV_DMA_COUNT0);
450 #endif /* DMABYTEIO */
451 outb(0x18, s->iodmaa + SV_DMA_MODE);
452 }
453
454 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
455 {
456 #ifdef DMABYTEIO
457 unsigned io = s->iodmac, u;
458
459 count >>= 1;
460 count--;
461 for (u = 4; u > 0; u--, addr >>= 8, io++)
462 outb(addr & 0xff, io);
463 for (u = 3; u > 0; u--, count >>= 8, io++)
464 outb(count & 0xff, io);
465 #else /* DMABYTEIO */
466 count >>= 1;
467 count--;
468 outl(addr, s->iodmac + SV_DMA_ADDR0);
469 outl(count, s->iodmac + SV_DMA_COUNT0);
470 #endif /* DMABYTEIO */
471 outb(0x14, s->iodmac + SV_DMA_MODE);
472 }
473
474 static inline unsigned get_dmaa(struct sv_state *s)
475 {
476 #ifdef DMABYTEIO
477 unsigned io = s->iodmaa+6, v = 0, u;
478
479 for (u = 3; u > 0; u--, io--) {
480 v <<= 8;
481 v |= inb(io);
482 }
483 return v + 1;
484 #else /* DMABYTEIO */
485 return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
486 #endif /* DMABYTEIO */
487 }
488
489 static inline unsigned get_dmac(struct sv_state *s)
490 {
491 #ifdef DMABYTEIO
492 unsigned io = s->iodmac+6, v = 0, u;
493
494 for (u = 3; u > 0; u--, io--) {
495 v <<= 8;
496 v |= inb(io);
497 }
498 return (v + 1) << 1;
499 #else /* DMABYTEIO */
500 return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
501 #endif /* DMABYTEIO */
502 }
503
504 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
505 {
506 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
507 udelay(10);
508 outb(data, s->ioenh + SV_CODEC_IDATA);
509 udelay(10);
510 }
511
512 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
513 {
514 unsigned char v;
515
516 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
517 udelay(10);
518 v = inb(s->ioenh + SV_CODEC_IDATA);
519 udelay(10);
520 return v;
521 }
522
523 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
524 {
525 unsigned long flags;
526
527 spin_lock_irqsave(&s->lock, flags);
528 outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
529 if (mask) {
530 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
531 udelay(10);
532 }
533 s->fmt = (s->fmt & mask) | data;
534 outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
535 udelay(10);
536 outb(0, s->ioenh + SV_CODEC_IADDR);
537 spin_unlock_irqrestore(&s->lock, flags);
538 udelay(10);
539 }
540
541 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
542 {
543 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
544 udelay(10);
545 outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
546 udelay(10);
547 }
548
549 #define REFFREQUENCY 24576000
550 #define ADCMULT 512
551 #define FULLRATE 48000
552
553 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
554 {
555 unsigned long flags;
556 unsigned char r, m=0, n=0;
557 unsigned xm, xn, xr, xd, metric = ~0U;
558 /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
559
560 if (rate < 625000/ADCMULT)
561 rate = 625000/ADCMULT;
562 if (rate > 150000000/ADCMULT)
563 rate = 150000000/ADCMULT;
564 /* slight violation of specs, needed for continuous sampling rates */
565 for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
566 for (xn = 3; xn < 35; xn++)
567 for (xm = 3; xm < 130; xm++) {
568 xr = REFFREQUENCY/ADCMULT * xm / xn;
569 xd = abs((signed)(xr - rate));
570 if (xd < metric) {
571 metric = xd;
572 m = xm - 2;
573 n = xn - 2;
574 }
575 }
576 reg &= 0x3f;
577 spin_lock_irqsave(&s->lock, flags);
578 outb(reg, s->ioenh + SV_CODEC_IADDR);
579 udelay(10);
580 outb(m, s->ioenh + SV_CODEC_IDATA);
581 udelay(10);
582 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
583 udelay(10);
584 outb(r | n, s->ioenh + SV_CODEC_IDATA);
585 spin_unlock_irqrestore(&s->lock, flags);
586 udelay(10);
587 return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
588 }
589
590 #if 0
591
592 static unsigned getpll(struct sv_state *s, unsigned char reg)
593 {
594 unsigned long flags;
595 unsigned char m, n;
596
597 reg &= 0x3f;
598 spin_lock_irqsave(&s->lock, flags);
599 outb(reg, s->ioenh + SV_CODEC_IADDR);
600 udelay(10);
601 m = inb(s->ioenh + SV_CODEC_IDATA);
602 udelay(10);
603 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
604 udelay(10);
605 n = inb(s->ioenh + SV_CODEC_IDATA);
606 spin_unlock_irqrestore(&s->lock, flags);
607 udelay(10);
608 return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
609 }
610
611 #endif
612
613 static void set_dac_rate(struct sv_state *s, unsigned rate)
614 {
615 unsigned div;
616 unsigned long flags;
617
618 if (rate > 48000)
619 rate = 48000;
620 if (rate < 4000)
621 rate = 4000;
622 div = (rate * 65536 + FULLRATE/2) / FULLRATE;
623 if (div > 65535)
624 div = 65535;
625 spin_lock_irqsave(&s->lock, flags);
626 wrindir(s, SV_CIPCMSR1, div >> 8);
627 wrindir(s, SV_CIPCMSR0, div);
628 spin_unlock_irqrestore(&s->lock, flags);
629 s->ratedac = (div * FULLRATE + 32768) / 65536;
630 }
631
632 static void set_adc_rate(struct sv_state *s, unsigned rate)
633 {
634 unsigned long flags;
635 unsigned rate1, rate2, div;
636
637 if (rate > 48000)
638 rate = 48000;
639 if (rate < 4000)
640 rate = 4000;
641 rate1 = setpll(s, SV_CIADCPLLM, rate);
642 div = (48000 + rate/2) / rate;
643 if (div > 8)
644 div = 8;
645 rate2 = (48000 + div/2) / div;
646 spin_lock_irqsave(&s->lock, flags);
647 wrindir(s, SV_CIADCALTSR, (div-1) << 4);
648 if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
649 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
650 s->rateadc = rate2;
651 } else {
652 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
653 s->rateadc = rate1;
654 }
655 spin_unlock_irqrestore(&s->lock, flags);
656 }
657
658 /* --------------------------------------------------------------------- */
659
660 static inline void stop_adc(struct sv_state *s)
661 {
662 unsigned long flags;
663
664 spin_lock_irqsave(&s->lock, flags);
665 s->enable &= ~SV_CENABLE_RE;
666 wrindir(s, SV_CIENABLE, s->enable);
667 spin_unlock_irqrestore(&s->lock, flags);
668 }
669
670 static inline void stop_dac(struct sv_state *s)
671 {
672 unsigned long flags;
673
674 spin_lock_irqsave(&s->lock, flags);
675 s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
676 wrindir(s, SV_CIENABLE, s->enable);
677 spin_unlock_irqrestore(&s->lock, flags);
678 }
679
680 static void start_dac(struct sv_state *s)
681 {
682 unsigned long flags;
683
684 spin_lock_irqsave(&s->lock, flags);
685 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
686 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
687 wrindir(s, SV_CIENABLE, s->enable);
688 }
689 spin_unlock_irqrestore(&s->lock, flags);
690 }
691
692 static void start_adc(struct sv_state *s)
693 {
694 unsigned long flags;
695
696 spin_lock_irqsave(&s->lock, flags);
697 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
698 && s->dma_adc.ready) {
699 s->enable |= SV_CENABLE_RE;
700 wrindir(s, SV_CIENABLE, s->enable);
701 }
702 spin_unlock_irqrestore(&s->lock, flags);
703 }
704
705 /* --------------------------------------------------------------------- */
706
707 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
708 #define DMABUF_MINORDER 1
709
710 static void dealloc_dmabuf(struct sv_state *s, struct dmabuf *db)
711 {
712 struct page *page, *pend;
713
714 if (db->rawbuf) {
715 /* undo marking the pages as reserved */
716 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
717 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
718 ClearPageReserved(page);
719 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
720 }
721 db->rawbuf = NULL;
722 db->mapped = db->ready = 0;
723 }
724
725
726 /* DMAA is used for playback, DMAC is used for recording */
727
728 static int prog_dmabuf(struct sv_state *s, unsigned rec)
729 {
730 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
731 unsigned rate = rec ? s->rateadc : s->ratedac;
732 int order;
733 unsigned bytepersec;
734 unsigned bufs;
735 struct page *page, *pend;
736 unsigned char fmt;
737 unsigned long flags;
738
739 spin_lock_irqsave(&s->lock, flags);
740 fmt = s->fmt;
741 if (rec) {
742 s->enable &= ~SV_CENABLE_RE;
743 fmt >>= SV_CFMT_CSHIFT;
744 } else {
745 s->enable &= ~SV_CENABLE_PE;
746 fmt >>= SV_CFMT_ASHIFT;
747 }
748 wrindir(s, SV_CIENABLE, s->enable);
749 spin_unlock_irqrestore(&s->lock, flags);
750 fmt &= SV_CFMT_MASK;
751 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
752 if (!db->rawbuf) {
753 db->ready = db->mapped = 0;
754 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
755 if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
756 break;
757 if (!db->rawbuf)
758 return -ENOMEM;
759 db->buforder = order;
760 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
761 printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
762 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
763 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
764 printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
765 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
766 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
767 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
768 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
769 SetPageReserved(page);
770 }
771 bytepersec = rate << sample_shift[fmt];
772 bufs = PAGE_SIZE << db->buforder;
773 if (db->ossfragshift) {
774 if ((1000 << db->ossfragshift) < bytepersec)
775 db->fragshift = ld2(bytepersec/1000);
776 else
777 db->fragshift = db->ossfragshift;
778 } else {
779 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
780 if (db->fragshift < 3)
781 db->fragshift = 3;
782 }
783 db->numfrag = bufs >> db->fragshift;
784 while (db->numfrag < 4 && db->fragshift > 3) {
785 db->fragshift--;
786 db->numfrag = bufs >> db->fragshift;
787 }
788 db->fragsize = 1 << db->fragshift;
789 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
790 db->numfrag = db->ossmaxfrags;
791 db->fragsamples = db->fragsize >> sample_shift[fmt];
792 db->dmasize = db->numfrag << db->fragshift;
793 memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
794 spin_lock_irqsave(&s->lock, flags);
795 if (rec) {
796 set_dmac(s, db->dmaaddr, db->numfrag << db->fragshift);
797 /* program enhanced mode registers */
798 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
799 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
800 } else {
801 set_dmaa(s, db->dmaaddr, db->numfrag << db->fragshift);
802 /* program enhanced mode registers */
803 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
804 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
805 }
806 spin_unlock_irqrestore(&s->lock, flags);
807 db->enabled = 1;
808 db->ready = 1;
809 return 0;
810 }
811
812 static inline void clear_advance(struct sv_state *s)
813 {
814 unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
815 unsigned char *buf = s->dma_dac.rawbuf;
816 unsigned bsize = s->dma_dac.dmasize;
817 unsigned bptr = s->dma_dac.swptr;
818 unsigned len = s->dma_dac.fragsize;
819
820 if (bptr + len > bsize) {
821 unsigned x = bsize - bptr;
822 memset(buf + bptr, c, x);
823 bptr = 0;
824 len -= x;
825 }
826 memset(buf + bptr, c, len);
827 }
828
829 /* call with spinlock held! */
830 static void sv_update_ptr(struct sv_state *s)
831 {
832 unsigned hwptr;
833 int diff;
834
835 /* update ADC pointer */
836 if (s->dma_adc.ready) {
837 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
838 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
839 s->dma_adc.hwptr = hwptr;
840 s->dma_adc.total_bytes += diff;
841 s->dma_adc.count += diff;
842 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
843 wake_up(&s->dma_adc.wait);
844 if (!s->dma_adc.mapped) {
845 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
846 s->enable &= ~SV_CENABLE_RE;
847 wrindir(s, SV_CIENABLE, s->enable);
848 s->dma_adc.error++;
849 }
850 }
851 }
852 /* update DAC pointer */
853 if (s->dma_dac.ready) {
854 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
855 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
856 s->dma_dac.hwptr = hwptr;
857 s->dma_dac.total_bytes += diff;
858 if (s->dma_dac.mapped) {
859 s->dma_dac.count += diff;
860 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
861 wake_up(&s->dma_dac.wait);
862 } else {
863 s->dma_dac.count -= diff;
864 if (s->dma_dac.count <= 0) {
865 s->enable &= ~SV_CENABLE_PE;
866 wrindir(s, SV_CIENABLE, s->enable);
867 s->dma_dac.error++;
868 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
869 clear_advance(s);
870 s->dma_dac.endcleared = 1;
871 }
872 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
873 wake_up(&s->dma_dac.wait);
874 }
875 }
876 }
877
878 /* hold spinlock for the following! */
879 static void sv_handle_midi(struct sv_state *s)
880 {
881 unsigned char ch;
882 int wake;
883
884 wake = 0;
885 while (!(inb(s->iomidi+1) & 0x80)) {
886 ch = inb(s->iomidi);
887 if (s->midi.icnt < MIDIINBUF) {
888 s->midi.ibuf[s->midi.iwr] = ch;
889 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
890 s->midi.icnt++;
891 }
892 wake = 1;
893 }
894 if (wake)
895 wake_up(&s->midi.iwait);
896 wake = 0;
897 while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
898 outb(s->midi.obuf[s->midi.ord], s->iomidi);
899 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
900 s->midi.ocnt--;
901 if (s->midi.ocnt < MIDIOUTBUF-16)
902 wake = 1;
903 }
904 if (wake)
905 wake_up(&s->midi.owait);
906 }
907
908 static irqreturn_t sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
909 {
910 struct sv_state *s = (struct sv_state *)dev_id;
911 unsigned int intsrc;
912
913 /* fastpath out, to ease interrupt sharing */
914 intsrc = inb(s->ioenh + SV_CODEC_STATUS);
915 if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
916 return IRQ_NONE;
917 spin_lock(&s->lock);
918 sv_update_ptr(s);
919 sv_handle_midi(s);
920 spin_unlock(&s->lock);
921 return IRQ_HANDLED;
922 }
923
924 static void sv_midi_timer(unsigned long data)
925 {
926 struct sv_state *s = (struct sv_state *)data;
927 unsigned long flags;
928
929 spin_lock_irqsave(&s->lock, flags);
930 sv_handle_midi(s);
931 spin_unlock_irqrestore(&s->lock, flags);
932 s->midi.timer.expires = jiffies+1;
933 add_timer(&s->midi.timer);
934 }
935
936 /* --------------------------------------------------------------------- */
937
938 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
939
940 #define VALIDATE_STATE(s) \
941 ({ \
942 if (!(s) || (s)->magic != SV_MAGIC) { \
943 printk(invalid_magic); \
944 return -ENXIO; \
945 } \
946 })
947
948 /* --------------------------------------------------------------------- */
949
950 #define MT_4 1
951 #define MT_5MUTE 2
952 #define MT_4MUTEMONO 3
953 #define MT_6MUTE 4
954
955 static const struct {
956 unsigned left:5;
957 unsigned right:5;
958 unsigned type:3;
959 unsigned rec:3;
960 } mixtable[SOUND_MIXER_NRDEVICES] = {
961 [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL, SV_CIMIX_ADCINR, MT_4, 0 },
962 [SOUND_MIXER_LINE1] = { SV_CIMIX_AUX1INL, SV_CIMIX_AUX1INR, MT_5MUTE, 5 },
963 [SOUND_MIXER_CD] = { SV_CIMIX_CDINL, SV_CIMIX_CDINR, MT_5MUTE, 1 },
964 [SOUND_MIXER_LINE] = { SV_CIMIX_LINEINL, SV_CIMIX_LINEINR, MT_5MUTE, 4 },
965 [SOUND_MIXER_MIC] = { SV_CIMIX_MICIN, SV_CIMIX_ADCINL, MT_4MUTEMONO, 6 },
966 [SOUND_MIXER_SYNTH] = { SV_CIMIX_SYNTHINL, SV_CIMIX_SYNTHINR, MT_5MUTE, 2 },
967 [SOUND_MIXER_LINE2] = { SV_CIMIX_AUX2INL, SV_CIMIX_AUX2INR, MT_5MUTE, 3 },
968 [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE, 7 },
969 [SOUND_MIXER_PCM] = { SV_CIMIX_PCMINL, SV_CIMIX_PCMINR, MT_6MUTE, 0 }
970 };
971
972 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
973
974 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
975 {
976 unsigned long flags;
977 unsigned char l, r, rl, rr;
978
979 spin_lock_irqsave(&s->lock, flags);
980 l = rdindir(s, mixtable[i].left);
981 r = rdindir(s, mixtable[i].right);
982 spin_unlock_irqrestore(&s->lock, flags);
983 switch (mixtable[i].type) {
984 case MT_4:
985 r &= 0xf;
986 l &= 0xf;
987 rl = 10 + 6 * (l & 15);
988 rr = 10 + 6 * (r & 15);
989 break;
990
991 case MT_4MUTEMONO:
992 rl = 55 - 3 * (l & 15);
993 if (r & 0x10)
994 rl += 45;
995 rr = rl;
996 r = l;
997 break;
998
999 case MT_5MUTE:
1000 default:
1001 rl = 100 - 3 * (l & 31);
1002 rr = 100 - 3 * (r & 31);
1003 break;
1004
1005 case MT_6MUTE:
1006 rl = 100 - 3 * (l & 63) / 2;
1007 rr = 100 - 3 * (r & 63) / 2;
1008 break;
1009 }
1010 if (l & 0x80)
1011 rl = 0;
1012 if (r & 0x80)
1013 rr = 0;
1014 return put_user((rr << 8) | rl, arg);
1015 }
1016
1017 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1018
1019 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1020 {
1021 [SOUND_MIXER_RECLEV] = 1,
1022 [SOUND_MIXER_LINE1] = 2,
1023 [SOUND_MIXER_CD] = 3,
1024 [SOUND_MIXER_LINE] = 4,
1025 [SOUND_MIXER_MIC] = 5,
1026 [SOUND_MIXER_SYNTH] = 6,
1027 [SOUND_MIXER_LINE2] = 7,
1028 [SOUND_MIXER_VOLUME] = 8,
1029 [SOUND_MIXER_PCM] = 9
1030 };
1031
1032 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1033
1034 static unsigned mixer_recmask(struct sv_state *s)
1035 {
1036 unsigned long flags;
1037 int i, j;
1038
1039 spin_lock_irqsave(&s->lock, flags);
1040 j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
1041 spin_unlock_irqrestore(&s->lock, flags);
1042 j &= 7;
1043 for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
1044 return 1 << i;
1045 }
1046
1047 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
1048 {
1049 unsigned long flags;
1050 int i, val;
1051 unsigned char l, r, rl, rr;
1052 int __user *p = (int __user *)arg;
1053
1054 VALIDATE_STATE(s);
1055 if (cmd == SOUND_MIXER_INFO) {
1056 mixer_info info;
1057 memset(&info, 0, sizeof(info));
1058 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1059 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1060 info.modify_counter = s->mix.modcnt;
1061 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1062 return -EFAULT;
1063 return 0;
1064 }
1065 if (cmd == SOUND_OLD_MIXER_INFO) {
1066 _old_mixer_info info;
1067 memset(&info, 0, sizeof(info));
1068 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1069 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1070 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1071 return -EFAULT;
1072 return 0;
1073 }
1074 if (cmd == OSS_GETVERSION)
1075 return put_user(SOUND_VERSION, p);
1076 if (cmd == SOUND_MIXER_PRIVATE1) { /* SRS settings */
1077 if (get_user(val, p))
1078 return -EFAULT;
1079 spin_lock_irqsave(&s->lock, flags);
1080 if (val & 1) {
1081 if (val & 2) {
1082 l = 4 - ((val >> 2) & 7);
1083 if (l & ~3)
1084 l = 4;
1085 r = 4 - ((val >> 5) & 7);
1086 if (r & ~3)
1087 r = 4;
1088 wrindir(s, SV_CISRSSPACE, l);
1089 wrindir(s, SV_CISRSCENTER, r);
1090 } else
1091 wrindir(s, SV_CISRSSPACE, 0x80);
1092 }
1093 l = rdindir(s, SV_CISRSSPACE);
1094 r = rdindir(s, SV_CISRSCENTER);
1095 spin_unlock_irqrestore(&s->lock, flags);
1096 if (l & 0x80)
1097 return put_user(0, p);
1098 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, p);
1099 }
1100 if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
1101 return -EINVAL;
1102 if (_SIOC_DIR(cmd) == _SIOC_READ) {
1103 switch (_IOC_NR(cmd)) {
1104 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1105 return put_user(mixer_recmask(s), p);
1106
1107 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1108 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1109 if (mixtable[i].type)
1110 val |= 1 << i;
1111 return put_user(val, p);
1112
1113 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1114 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1115 if (mixtable[i].rec)
1116 val |= 1 << i;
1117 return put_user(val, p);
1118
1119 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1120 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1121 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1122 val |= 1 << i;
1123 return put_user(val, p);
1124
1125 case SOUND_MIXER_CAPS:
1126 return put_user(SOUND_CAP_EXCL_INPUT, p);
1127
1128 default:
1129 i = _IOC_NR(cmd);
1130 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1131 return -EINVAL;
1132 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1133 return return_mixval(s, i, p);
1134 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1135 if (!volidx[i])
1136 return -EINVAL;
1137 return put_user(s->mix.vol[volidx[i]-1], p);
1138 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1139 }
1140 }
1141 if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
1142 return -EINVAL;
1143 s->mix.modcnt++;
1144 switch (_IOC_NR(cmd)) {
1145 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1146 if (get_user(val, p))
1147 return -EFAULT;
1148 i = hweight32(val);
1149 if (i == 0)
1150 return 0; /*val = mixer_recmask(s);*/
1151 else if (i > 1)
1152 val &= ~mixer_recmask(s);
1153 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1154 if (!(val & (1 << i)))
1155 continue;
1156 if (mixtable[i].rec)
1157 break;
1158 }
1159 if (i == SOUND_MIXER_NRDEVICES)
1160 return 0;
1161 spin_lock_irqsave(&s->lock, flags);
1162 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1163 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1164 spin_unlock_irqrestore(&s->lock, flags);
1165 return 0;
1166
1167 default:
1168 i = _IOC_NR(cmd);
1169 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1170 return -EINVAL;
1171 if (get_user(val, p))
1172 return -EFAULT;
1173 l = val & 0xff;
1174 r = (val >> 8) & 0xff;
1175 if (mixtable[i].type == MT_4MUTEMONO)
1176 l = (r + l) / 2;
1177 if (l > 100)
1178 l = 100;
1179 if (r > 100)
1180 r = 100;
1181 spin_lock_irqsave(&s->lock, flags);
1182 switch (mixtable[i].type) {
1183 case MT_4:
1184 if (l >= 10)
1185 l -= 10;
1186 if (r >= 10)
1187 r -= 10;
1188 frobindir(s, mixtable[i].left, 0xf0, l / 6);
1189 frobindir(s, mixtable[i].right, 0xf0, l / 6);
1190 break;
1191
1192 case MT_4MUTEMONO:
1193 rr = 0;
1194 if (l < 10)
1195 rl = 0x80;
1196 else {
1197 if (l >= 55) {
1198 rr = 0x10;
1199 l -= 45;
1200 }
1201 rl = (55 - l) / 3;
1202 }
1203 wrindir(s, mixtable[i].left, rl);
1204 frobindir(s, mixtable[i].right, ~0x10, rr);
1205 break;
1206
1207 case MT_5MUTE:
1208 if (l < 7)
1209 rl = 0x80;
1210 else
1211 rl = (100 - l) / 3;
1212 if (r < 7)
1213 rr = 0x80;
1214 else
1215 rr = (100 - r) / 3;
1216 wrindir(s, mixtable[i].left, rl);
1217 wrindir(s, mixtable[i].right, rr);
1218 break;
1219
1220 case MT_6MUTE:
1221 if (l < 6)
1222 rl = 0x80;
1223 else
1224 rl = (100 - l) * 2 / 3;
1225 if (r < 6)
1226 rr = 0x80;
1227 else
1228 rr = (100 - r) * 2 / 3;
1229 wrindir(s, mixtable[i].left, rl);
1230 wrindir(s, mixtable[i].right, rr);
1231 break;
1232 }
1233 spin_unlock_irqrestore(&s->lock, flags);
1234 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1235 return return_mixval(s, i, p);
1236 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1237 if (!volidx[i])
1238 return -EINVAL;
1239 s->mix.vol[volidx[i]-1] = val;
1240 return put_user(s->mix.vol[volidx[i]-1], p);
1241 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1242 }
1243 }
1244
1245 /* --------------------------------------------------------------------- */
1246
1247 static int sv_open_mixdev(struct inode *inode, struct file *file)
1248 {
1249 int minor = iminor(inode);
1250 struct list_head *list;
1251 struct sv_state *s;
1252
1253 for (list = devs.next; ; list = list->next) {
1254 if (list == &devs)
1255 return -ENODEV;
1256 s = list_entry(list, struct sv_state, devs);
1257 if (s->dev_mixer == minor)
1258 break;
1259 }
1260 VALIDATE_STATE(s);
1261 file->private_data = s;
1262 return nonseekable_open(inode, file);
1263 }
1264
1265 static int sv_release_mixdev(struct inode *inode, struct file *file)
1266 {
1267 struct sv_state *s = (struct sv_state *)file->private_data;
1268
1269 VALIDATE_STATE(s);
1270 return 0;
1271 }
1272
1273 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1274 {
1275 return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1276 }
1277
1278 static /*const*/ struct file_operations sv_mixer_fops = {
1279 .owner = THIS_MODULE,
1280 .llseek = no_llseek,
1281 .ioctl = sv_ioctl_mixdev,
1282 .open = sv_open_mixdev,
1283 .release = sv_release_mixdev,
1284 };
1285
1286 /* --------------------------------------------------------------------- */
1287
1288 static int drain_dac(struct sv_state *s, int nonblock)
1289 {
1290 DECLARE_WAITQUEUE(wait, current);
1291 unsigned long flags;
1292 int count, tmo;
1293
1294 if (s->dma_dac.mapped || !s->dma_dac.ready)
1295 return 0;
1296 add_wait_queue(&s->dma_dac.wait, &wait);
1297 for (;;) {
1298 __set_current_state(TASK_INTERRUPTIBLE);
1299 spin_lock_irqsave(&s->lock, flags);
1300 count = s->dma_dac.count;
1301 spin_unlock_irqrestore(&s->lock, flags);
1302 if (count <= 0)
1303 break;
1304 if (signal_pending(current))
1305 break;
1306 if (nonblock) {
1307 remove_wait_queue(&s->dma_dac.wait, &wait);
1308 set_current_state(TASK_RUNNING);
1309 return -EBUSY;
1310 }
1311 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1312 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1313 if (!schedule_timeout(tmo + 1))
1314 printk(KERN_DEBUG "sv: dma timed out??\n");
1315 }
1316 remove_wait_queue(&s->dma_dac.wait, &wait);
1317 set_current_state(TASK_RUNNING);
1318 if (signal_pending(current))
1319 return -ERESTARTSYS;
1320 return 0;
1321 }
1322
1323 /* --------------------------------------------------------------------- */
1324
1325 static ssize_t sv_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1326 {
1327 struct sv_state *s = (struct sv_state *)file->private_data;
1328 DECLARE_WAITQUEUE(wait, current);
1329 ssize_t ret;
1330 unsigned long flags;
1331 unsigned swptr;
1332 int cnt;
1333
1334 VALIDATE_STATE(s);
1335 if (s->dma_adc.mapped)
1336 return -ENXIO;
1337 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1338 return ret;
1339 if (!access_ok(VERIFY_WRITE, buffer, count))
1340 return -EFAULT;
1341 ret = 0;
1342 #if 0
1343 spin_lock_irqsave(&s->lock, flags);
1344 sv_update_ptr(s);
1345 spin_unlock_irqrestore(&s->lock, flags);
1346 #endif
1347 add_wait_queue(&s->dma_adc.wait, &wait);
1348 while (count > 0) {
1349 spin_lock_irqsave(&s->lock, flags);
1350 swptr = s->dma_adc.swptr;
1351 cnt = s->dma_adc.dmasize-swptr;
1352 if (s->dma_adc.count < cnt)
1353 cnt = s->dma_adc.count;
1354 if (cnt <= 0)
1355 __set_current_state(TASK_INTERRUPTIBLE);
1356 spin_unlock_irqrestore(&s->lock, flags);
1357 if (cnt > count)
1358 cnt = count;
1359 if (cnt <= 0) {
1360 if (s->dma_adc.enabled)
1361 start_adc(s);
1362 if (file->f_flags & O_NONBLOCK) {
1363 if (!ret)
1364 ret = -EAGAIN;
1365 break;
1366 }
1367 if (!schedule_timeout(HZ)) {
1368 printk(KERN_DEBUG "sv: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1369 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1370 s->dma_adc.hwptr, s->dma_adc.swptr);
1371 stop_adc(s);
1372 spin_lock_irqsave(&s->lock, flags);
1373 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1374 /* program enhanced mode registers */
1375 wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
1376 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1);
1377 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1378 spin_unlock_irqrestore(&s->lock, flags);
1379 }
1380 if (signal_pending(current)) {
1381 if (!ret)
1382 ret = -ERESTARTSYS;
1383 break;
1384 }
1385 continue;
1386 }
1387 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1388 if (!ret)
1389 ret = -EFAULT;
1390 break;
1391 }
1392 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1393 spin_lock_irqsave(&s->lock, flags);
1394 s->dma_adc.swptr = swptr;
1395 s->dma_adc.count -= cnt;
1396 spin_unlock_irqrestore(&s->lock, flags);
1397 count -= cnt;
1398 buffer += cnt;
1399 ret += cnt;
1400 if (s->dma_adc.enabled)
1401 start_adc(s);
1402 }
1403 remove_wait_queue(&s->dma_adc.wait, &wait);
1404 set_current_state(TASK_RUNNING);
1405 return ret;
1406 }
1407
1408 static ssize_t sv_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1409 {
1410 struct sv_state *s = (struct sv_state *)file->private_data;
1411 DECLARE_WAITQUEUE(wait, current);
1412 ssize_t ret;
1413 unsigned long flags;
1414 unsigned swptr;
1415 int cnt;
1416
1417 VALIDATE_STATE(s);
1418 if (s->dma_dac.mapped)
1419 return -ENXIO;
1420 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1421 return ret;
1422 if (!access_ok(VERIFY_READ, buffer, count))
1423 return -EFAULT;
1424 ret = 0;
1425 #if 0
1426 spin_lock_irqsave(&s->lock, flags);
1427 sv_update_ptr(s);
1428 spin_unlock_irqrestore(&s->lock, flags);
1429 #endif
1430 add_wait_queue(&s->dma_dac.wait, &wait);
1431 while (count > 0) {
1432 spin_lock_irqsave(&s->lock, flags);
1433 if (s->dma_dac.count < 0) {
1434 s->dma_dac.count = 0;
1435 s->dma_dac.swptr = s->dma_dac.hwptr;
1436 }
1437 swptr = s->dma_dac.swptr;
1438 cnt = s->dma_dac.dmasize-swptr;
1439 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1440 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1441 if (cnt <= 0)
1442 __set_current_state(TASK_INTERRUPTIBLE);
1443 spin_unlock_irqrestore(&s->lock, flags);
1444 if (cnt > count)
1445 cnt = count;
1446 if (cnt <= 0) {
1447 if (s->dma_dac.enabled)
1448 start_dac(s);
1449 if (file->f_flags & O_NONBLOCK) {
1450 if (!ret)
1451 ret = -EAGAIN;
1452 break;
1453 }
1454 if (!schedule_timeout(HZ)) {
1455 printk(KERN_DEBUG "sv: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1456 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1457 s->dma_dac.hwptr, s->dma_dac.swptr);
1458 stop_dac(s);
1459 spin_lock_irqsave(&s->lock, flags);
1460 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1461 /* program enhanced mode registers */
1462 wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
1463 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1);
1464 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1465 spin_unlock_irqrestore(&s->lock, flags);
1466 }
1467 if (signal_pending(current)) {
1468 if (!ret)
1469 ret = -ERESTARTSYS;
1470 break;
1471 }
1472 continue;
1473 }
1474 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1475 if (!ret)
1476 ret = -EFAULT;
1477 break;
1478 }
1479 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1480 spin_lock_irqsave(&s->lock, flags);
1481 s->dma_dac.swptr = swptr;
1482 s->dma_dac.count += cnt;
1483 s->dma_dac.endcleared = 0;
1484 spin_unlock_irqrestore(&s->lock, flags);
1485 count -= cnt;
1486 buffer += cnt;
1487 ret += cnt;
1488 if (s->dma_dac.enabled)
1489 start_dac(s);
1490 }
1491 remove_wait_queue(&s->dma_dac.wait, &wait);
1492 set_current_state(TASK_RUNNING);
1493 return ret;
1494 }
1495
1496 /* No kernel lock - we have our own spinlock */
1497 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1498 {
1499 struct sv_state *s = (struct sv_state *)file->private_data;
1500 unsigned long flags;
1501 unsigned int mask = 0;
1502
1503 VALIDATE_STATE(s);
1504 if (file->f_mode & FMODE_WRITE) {
1505 if (!s->dma_dac.ready && prog_dmabuf(s, 1))
1506 return 0;
1507 poll_wait(file, &s->dma_dac.wait, wait);
1508 }
1509 if (file->f_mode & FMODE_READ) {
1510 if (!s->dma_adc.ready && prog_dmabuf(s, 0))
1511 return 0;
1512 poll_wait(file, &s->dma_adc.wait, wait);
1513 }
1514 spin_lock_irqsave(&s->lock, flags);
1515 sv_update_ptr(s);
1516 if (file->f_mode & FMODE_READ) {
1517 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1518 mask |= POLLIN | POLLRDNORM;
1519 }
1520 if (file->f_mode & FMODE_WRITE) {
1521 if (s->dma_dac.mapped) {
1522 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1523 mask |= POLLOUT | POLLWRNORM;
1524 } else {
1525 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1526 mask |= POLLOUT | POLLWRNORM;
1527 }
1528 }
1529 spin_unlock_irqrestore(&s->lock, flags);
1530 return mask;
1531 }
1532
1533 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1534 {
1535 struct sv_state *s = (struct sv_state *)file->private_data;
1536 struct dmabuf *db;
1537 int ret = -EINVAL;
1538 unsigned long size;
1539
1540 VALIDATE_STATE(s);
1541 lock_kernel();
1542 if (vma->vm_flags & VM_WRITE) {
1543 if ((ret = prog_dmabuf(s, 1)) != 0)
1544 goto out;
1545 db = &s->dma_dac;
1546 } else if (vma->vm_flags & VM_READ) {
1547 if ((ret = prog_dmabuf(s, 0)) != 0)
1548 goto out;
1549 db = &s->dma_adc;
1550 } else
1551 goto out;
1552 ret = -EINVAL;
1553 if (vma->vm_pgoff != 0)
1554 goto out;
1555 size = vma->vm_end - vma->vm_start;
1556 if (size > (PAGE_SIZE << db->buforder))
1557 goto out;
1558 ret = -EAGAIN;
1559 if (remap_pfn_range(vma, vma->vm_start,
1560 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1561 size, vma->vm_page_prot))
1562 goto out;
1563 db->mapped = 1;
1564 ret = 0;
1565 out:
1566 unlock_kernel();
1567 return ret;
1568 }
1569
1570 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1571 {
1572 struct sv_state *s = (struct sv_state *)file->private_data;
1573 unsigned long flags;
1574 audio_buf_info abinfo;
1575 count_info cinfo;
1576 int count;
1577 int val, mapped, ret;
1578 unsigned char fmtm, fmtd;
1579 void __user *argp = (void __user *)arg;
1580 int __user *p = argp;
1581
1582 VALIDATE_STATE(s);
1583 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1584 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1585 switch (cmd) {
1586 case OSS_GETVERSION:
1587 return put_user(SOUND_VERSION, p);
1588
1589 case SNDCTL_DSP_SYNC:
1590 if (file->f_mode & FMODE_WRITE)
1591 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1592 return 0;
1593
1594 case SNDCTL_DSP_SETDUPLEX:
1595 return 0;
1596
1597 case SNDCTL_DSP_GETCAPS:
1598 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1599
1600 case SNDCTL_DSP_RESET:
1601 if (file->f_mode & FMODE_WRITE) {
1602 stop_dac(s);
1603 synchronize_irq(s->irq);
1604 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1605 }
1606 if (file->f_mode & FMODE_READ) {
1607 stop_adc(s);
1608 synchronize_irq(s->irq);
1609 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1610 }
1611 return 0;
1612
1613 case SNDCTL_DSP_SPEED:
1614 if (get_user(val, p))
1615 return -EFAULT;
1616 if (val >= 0) {
1617 if (file->f_mode & FMODE_READ) {
1618 stop_adc(s);
1619 s->dma_adc.ready = 0;
1620 set_adc_rate(s, val);
1621 }
1622 if (file->f_mode & FMODE_WRITE) {
1623 stop_dac(s);
1624 s->dma_dac.ready = 0;
1625 set_dac_rate(s, val);
1626 }
1627 }
1628 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1629
1630 case SNDCTL_DSP_STEREO:
1631 if (get_user(val, p))
1632 return -EFAULT;
1633 fmtd = 0;
1634 fmtm = ~0;
1635 if (file->f_mode & FMODE_READ) {
1636 stop_adc(s);
1637 s->dma_adc.ready = 0;
1638 if (val)
1639 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1640 else
1641 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1642 }
1643 if (file->f_mode & FMODE_WRITE) {
1644 stop_dac(s);
1645 s->dma_dac.ready = 0;
1646 if (val)
1647 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1648 else
1649 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1650 }
1651 set_fmt(s, fmtm, fmtd);
1652 return 0;
1653
1654 case SNDCTL_DSP_CHANNELS:
1655 if (get_user(val, p))
1656 return -EFAULT;
1657 if (val != 0) {
1658 fmtd = 0;
1659 fmtm = ~0;
1660 if (file->f_mode & FMODE_READ) {
1661 stop_adc(s);
1662 s->dma_adc.ready = 0;
1663 if (val >= 2)
1664 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1665 else
1666 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1667 }
1668 if (file->f_mode & FMODE_WRITE) {
1669 stop_dac(s);
1670 s->dma_dac.ready = 0;
1671 if (val >= 2)
1672 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1673 else
1674 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1675 }
1676 set_fmt(s, fmtm, fmtd);
1677 }
1678 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1679 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1680
1681 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1682 return put_user(AFMT_S16_LE|AFMT_U8, p);
1683
1684 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1685 if (get_user(val, p))
1686 return -EFAULT;
1687 if (val != AFMT_QUERY) {
1688 fmtd = 0;
1689 fmtm = ~0;
1690 if (file->f_mode & FMODE_READ) {
1691 stop_adc(s);
1692 s->dma_adc.ready = 0;
1693 if (val == AFMT_S16_LE)
1694 fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1695 else
1696 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1697 }
1698 if (file->f_mode & FMODE_WRITE) {
1699 stop_dac(s);
1700 s->dma_dac.ready = 0;
1701 if (val == AFMT_S16_LE)
1702 fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1703 else
1704 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1705 }
1706 set_fmt(s, fmtm, fmtd);
1707 }
1708 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1709 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, p);
1710
1711 case SNDCTL_DSP_POST:
1712 return 0;
1713
1714 case SNDCTL_DSP_GETTRIGGER:
1715 val = 0;
1716 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE)
1717 val |= PCM_ENABLE_INPUT;
1718 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE)
1719 val |= PCM_ENABLE_OUTPUT;
1720 return put_user(val, p);
1721
1722 case SNDCTL_DSP_SETTRIGGER:
1723 if (get_user(val, p))
1724 return -EFAULT;
1725 if (file->f_mode & FMODE_READ) {
1726 if (val & PCM_ENABLE_INPUT) {
1727 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1728 return ret;
1729 s->dma_adc.enabled = 1;
1730 start_adc(s);
1731 } else {
1732 s->dma_adc.enabled = 0;
1733 stop_adc(s);
1734 }
1735 }
1736 if (file->f_mode & FMODE_WRITE) {
1737 if (val & PCM_ENABLE_OUTPUT) {
1738 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1739 return ret;
1740 s->dma_dac.enabled = 1;
1741 start_dac(s);
1742 } else {
1743 s->dma_dac.enabled = 0;
1744 stop_dac(s);
1745 }
1746 }
1747 return 0;
1748
1749 case SNDCTL_DSP_GETOSPACE:
1750 if (!(file->f_mode & FMODE_WRITE))
1751 return -EINVAL;
1752 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1753 return val;
1754 spin_lock_irqsave(&s->lock, flags);
1755 sv_update_ptr(s);
1756 abinfo.fragsize = s->dma_dac.fragsize;
1757 count = s->dma_dac.count;
1758 if (count < 0)
1759 count = 0;
1760 abinfo.bytes = s->dma_dac.dmasize - count;
1761 abinfo.fragstotal = s->dma_dac.numfrag;
1762 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1763 spin_unlock_irqrestore(&s->lock, flags);
1764 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1765
1766 case SNDCTL_DSP_GETISPACE:
1767 if (!(file->f_mode & FMODE_READ))
1768 return -EINVAL;
1769 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1770 return val;
1771 spin_lock_irqsave(&s->lock, flags);
1772 sv_update_ptr(s);
1773 abinfo.fragsize = s->dma_adc.fragsize;
1774 count = s->dma_adc.count;
1775 if (count < 0)
1776 count = 0;
1777 abinfo.bytes = count;
1778 abinfo.fragstotal = s->dma_adc.numfrag;
1779 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1780 spin_unlock_irqrestore(&s->lock, flags);
1781 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1782
1783 case SNDCTL_DSP_NONBLOCK:
1784 file->f_flags |= O_NONBLOCK;
1785 return 0;
1786
1787 case SNDCTL_DSP_GETODELAY:
1788 if (!(file->f_mode & FMODE_WRITE))
1789 return -EINVAL;
1790 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1791 return val;
1792 spin_lock_irqsave(&s->lock, flags);
1793 sv_update_ptr(s);
1794 count = s->dma_dac.count;
1795 spin_unlock_irqrestore(&s->lock, flags);
1796 if (count < 0)
1797 count = 0;
1798 return put_user(count, p);
1799
1800 case SNDCTL_DSP_GETIPTR:
1801 if (!(file->f_mode & FMODE_READ))
1802 return -EINVAL;
1803 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1804 return val;
1805 spin_lock_irqsave(&s->lock, flags);
1806 sv_update_ptr(s);
1807 cinfo.bytes = s->dma_adc.total_bytes;
1808 count = s->dma_adc.count;
1809 if (count < 0)
1810 count = 0;
1811 cinfo.blocks = count >> s->dma_adc.fragshift;
1812 cinfo.ptr = s->dma_adc.hwptr;
1813 if (s->dma_adc.mapped)
1814 s->dma_adc.count &= s->dma_adc.fragsize-1;
1815 spin_unlock_irqrestore(&s->lock, flags);
1816 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1817 return -EFAULT;
1818 return 0;
1819
1820 case SNDCTL_DSP_GETOPTR:
1821 if (!(file->f_mode & FMODE_WRITE))
1822 return -EINVAL;
1823 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1824 return val;
1825 spin_lock_irqsave(&s->lock, flags);
1826 sv_update_ptr(s);
1827 cinfo.bytes = s->dma_dac.total_bytes;
1828 count = s->dma_dac.count;
1829 if (count < 0)
1830 count = 0;
1831 cinfo.blocks = count >> s->dma_dac.fragshift;
1832 cinfo.ptr = s->dma_dac.hwptr;
1833 if (s->dma_dac.mapped)
1834 s->dma_dac.count &= s->dma_dac.fragsize-1;
1835 spin_unlock_irqrestore(&s->lock, flags);
1836 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1837 return -EFAULT;
1838 return 0;
1839
1840 case SNDCTL_DSP_GETBLKSIZE:
1841 if (file->f_mode & FMODE_WRITE) {
1842 if ((val = prog_dmabuf(s, 0)))
1843 return val;
1844 return put_user(s->dma_dac.fragsize, p);
1845 }
1846 if ((val = prog_dmabuf(s, 1)))
1847 return val;
1848 return put_user(s->dma_adc.fragsize, p);
1849
1850 case SNDCTL_DSP_SETFRAGMENT:
1851 if (get_user(val, p))
1852 return -EFAULT;
1853 if (file->f_mode & FMODE_READ) {
1854 s->dma_adc.ossfragshift = val & 0xffff;
1855 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1856 if (s->dma_adc.ossfragshift < 4)
1857 s->dma_adc.ossfragshift = 4;
1858 if (s->dma_adc.ossfragshift > 15)
1859 s->dma_adc.ossfragshift = 15;
1860 if (s->dma_adc.ossmaxfrags < 4)
1861 s->dma_adc.ossmaxfrags = 4;
1862 }
1863 if (file->f_mode & FMODE_WRITE) {
1864 s->dma_dac.ossfragshift = val & 0xffff;
1865 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1866 if (s->dma_dac.ossfragshift < 4)
1867 s->dma_dac.ossfragshift = 4;
1868 if (s->dma_dac.ossfragshift > 15)
1869 s->dma_dac.ossfragshift = 15;
1870 if (s->dma_dac.ossmaxfrags < 4)
1871 s->dma_dac.ossmaxfrags = 4;
1872 }
1873 return 0;
1874
1875 case SNDCTL_DSP_SUBDIVIDE:
1876 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1877 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1878 return -EINVAL;
1879 if (get_user(val, p))
1880 return -EFAULT;
1881 if (val != 1 && val != 2 && val != 4)
1882 return -EINVAL;
1883 if (file->f_mode & FMODE_READ)
1884 s->dma_adc.subdivision = val;
1885 if (file->f_mode & FMODE_WRITE)
1886 s->dma_dac.subdivision = val;
1887 return 0;
1888
1889 case SOUND_PCM_READ_RATE:
1890 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1891
1892 case SOUND_PCM_READ_CHANNELS:
1893 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1894 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1895
1896 case SOUND_PCM_READ_BITS:
1897 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1898 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? 16 : 8, p);
1899
1900 case SOUND_PCM_WRITE_FILTER:
1901 case SNDCTL_DSP_SETSYNCRO:
1902 case SOUND_PCM_READ_FILTER:
1903 return -EINVAL;
1904
1905 }
1906 return mixer_ioctl(s, cmd, arg);
1907 }
1908
1909 static int sv_open(struct inode *inode, struct file *file)
1910 {
1911 int minor = iminor(inode);
1912 DECLARE_WAITQUEUE(wait, current);
1913 unsigned char fmtm = ~0, fmts = 0;
1914 struct list_head *list;
1915 struct sv_state *s;
1916
1917 for (list = devs.next; ; list = list->next) {
1918 if (list == &devs)
1919 return -ENODEV;
1920 s = list_entry(list, struct sv_state, devs);
1921 if (!((s->dev_audio ^ minor) & ~0xf))
1922 break;
1923 }
1924 VALIDATE_STATE(s);
1925 file->private_data = s;
1926 /* wait for device to become free */
1927 mutex_lock(&s->open_mutex);
1928 while (s->open_mode & file->f_mode) {
1929 if (file->f_flags & O_NONBLOCK) {
1930 mutex_unlock(&s->open_mutex);
1931 return -EBUSY;
1932 }
1933 add_wait_queue(&s->open_wait, &wait);
1934 __set_current_state(TASK_INTERRUPTIBLE);
1935 mutex_unlock(&s->open_mutex);
1936 schedule();
1937 remove_wait_queue(&s->open_wait, &wait);
1938 set_current_state(TASK_RUNNING);
1939 if (signal_pending(current))
1940 return -ERESTARTSYS;
1941 mutex_lock(&s->open_mutex);
1942 }
1943 if (file->f_mode & FMODE_READ) {
1944 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1945 if ((minor & 0xf) == SND_DEV_DSP16)
1946 fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1947 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1948 s->dma_adc.enabled = 1;
1949 set_adc_rate(s, 8000);
1950 }
1951 if (file->f_mode & FMODE_WRITE) {
1952 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1953 if ((minor & 0xf) == SND_DEV_DSP16)
1954 fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1955 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1956 s->dma_dac.enabled = 1;
1957 set_dac_rate(s, 8000);
1958 }
1959 set_fmt(s, fmtm, fmts);
1960 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1961 mutex_unlock(&s->open_mutex);
1962 return nonseekable_open(inode, file);
1963 }
1964
1965 static int sv_release(struct inode *inode, struct file *file)
1966 {
1967 struct sv_state *s = (struct sv_state *)file->private_data;
1968
1969 VALIDATE_STATE(s);
1970 lock_kernel();
1971 if (file->f_mode & FMODE_WRITE)
1972 drain_dac(s, file->f_flags & O_NONBLOCK);
1973 mutex_lock(&s->open_mutex);
1974 if (file->f_mode & FMODE_WRITE) {
1975 stop_dac(s);
1976 dealloc_dmabuf(s, &s->dma_dac);
1977 }
1978 if (file->f_mode & FMODE_READ) {
1979 stop_adc(s);
1980 dealloc_dmabuf(s, &s->dma_adc);
1981 }
1982 s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
1983 wake_up(&s->open_wait);
1984 mutex_unlock(&s->open_mutex);
1985 unlock_kernel();
1986 return 0;
1987 }
1988
1989 static /*const*/ struct file_operations sv_audio_fops = {
1990 .owner = THIS_MODULE,
1991 .llseek = no_llseek,
1992 .read = sv_read,
1993 .write = sv_write,
1994 .poll = sv_poll,
1995 .ioctl = sv_ioctl,
1996 .mmap = sv_mmap,
1997 .open = sv_open,
1998 .release = sv_release,
1999 };
2000
2001 /* --------------------------------------------------------------------- */
2002
2003 static ssize_t sv_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2004 {
2005 struct sv_state *s = (struct sv_state *)file->private_data;
2006 DECLARE_WAITQUEUE(wait, current);
2007 ssize_t ret;
2008 unsigned long flags;
2009 unsigned ptr;
2010 int cnt;
2011
2012 VALIDATE_STATE(s);
2013 if (!access_ok(VERIFY_WRITE, buffer, count))
2014 return -EFAULT;
2015 if (count == 0)
2016 return 0;
2017 ret = 0;
2018 add_wait_queue(&s->midi.iwait, &wait);
2019 while (count > 0) {
2020 spin_lock_irqsave(&s->lock, flags);
2021 ptr = s->midi.ird;
2022 cnt = MIDIINBUF - ptr;
2023 if (s->midi.icnt < cnt)
2024 cnt = s->midi.icnt;
2025 if (cnt <= 0)
2026 __set_current_state(TASK_INTERRUPTIBLE);
2027 spin_unlock_irqrestore(&s->lock, flags);
2028 if (cnt > count)
2029 cnt = count;
2030 if (cnt <= 0) {
2031 if (file->f_flags & O_NONBLOCK) {
2032 if (!ret)
2033 ret = -EAGAIN;
2034 break;
2035 }
2036 schedule();
2037 if (signal_pending(current)) {
2038 if (!ret)
2039 ret = -ERESTARTSYS;
2040 break;
2041 }
2042 continue;
2043 }
2044 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2045 if (!ret)
2046 ret = -EFAULT;
2047 break;
2048 }
2049 ptr = (ptr + cnt) % MIDIINBUF;
2050 spin_lock_irqsave(&s->lock, flags);
2051 s->midi.ird = ptr;
2052 s->midi.icnt -= cnt;
2053 spin_unlock_irqrestore(&s->lock, flags);
2054 count -= cnt;
2055 buffer += cnt;
2056 ret += cnt;
2057 break;
2058 }
2059 __set_current_state(TASK_RUNNING);
2060 remove_wait_queue(&s->midi.iwait, &wait);
2061 return ret;
2062 }
2063
2064 static ssize_t sv_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2065 {
2066 struct sv_state *s = (struct sv_state *)file->private_data;
2067 DECLARE_WAITQUEUE(wait, current);
2068 ssize_t ret;
2069 unsigned long flags;
2070 unsigned ptr;
2071 int cnt;
2072
2073 VALIDATE_STATE(s);
2074 if (!access_ok(VERIFY_READ, buffer, count))
2075 return -EFAULT;
2076 if (count == 0)
2077 return 0;
2078 ret = 0;
2079 add_wait_queue(&s->midi.owait, &wait);
2080 while (count > 0) {
2081 spin_lock_irqsave(&s->lock, flags);
2082 ptr = s->midi.owr;
2083 cnt = MIDIOUTBUF - ptr;
2084 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2085 cnt = MIDIOUTBUF - s->midi.ocnt;
2086 if (cnt <= 0) {
2087 __set_current_state(TASK_INTERRUPTIBLE);
2088 sv_handle_midi(s);
2089 }
2090 spin_unlock_irqrestore(&s->lock, flags);
2091 if (cnt > count)
2092 cnt = count;
2093 if (cnt <= 0) {
2094 if (file->f_flags & O_NONBLOCK) {
2095 if (!ret)
2096 ret = -EAGAIN;
2097 break;
2098 }
2099 schedule();
2100 if (signal_pending(current)) {
2101 if (!ret)
2102 ret = -ERESTARTSYS;
2103 break;
2104 }
2105 continue;
2106 }
2107 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2108 if (!ret)
2109 ret = -EFAULT;
2110 break;
2111 }
2112 ptr = (ptr + cnt) % MIDIOUTBUF;
2113 spin_lock_irqsave(&s->lock, flags);
2114 s->midi.owr = ptr;
2115 s->midi.ocnt += cnt;
2116 spin_unlock_irqrestore(&s->lock, flags);
2117 count -= cnt;
2118 buffer += cnt;
2119 ret += cnt;
2120 spin_lock_irqsave(&s->lock, flags);
2121 sv_handle_midi(s);
2122 spin_unlock_irqrestore(&s->lock, flags);
2123 }
2124 __set_current_state(TASK_RUNNING);
2125 remove_wait_queue(&s->midi.owait, &wait);
2126 return ret;
2127 }
2128
2129 /* No kernel lock - we have our own spinlock */
2130 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
2131 {
2132 struct sv_state *s = (struct sv_state *)file->private_data;
2133 unsigned long flags;
2134 unsigned int mask = 0;
2135
2136 VALIDATE_STATE(s);
2137 if (file->f_mode & FMODE_WRITE)
2138 poll_wait(file, &s->midi.owait, wait);
2139 if (file->f_mode & FMODE_READ)
2140 poll_wait(file, &s->midi.iwait, wait);
2141 spin_lock_irqsave(&s->lock, flags);
2142 if (file->f_mode & FMODE_READ) {
2143 if (s->midi.icnt > 0)
2144 mask |= POLLIN | POLLRDNORM;
2145 }
2146 if (file->f_mode & FMODE_WRITE) {
2147 if (s->midi.ocnt < MIDIOUTBUF)
2148 mask |= POLLOUT | POLLWRNORM;
2149 }
2150 spin_unlock_irqrestore(&s->lock, flags);
2151 return mask;
2152 }
2153
2154 static int sv_midi_open(struct inode *inode, struct file *file)
2155 {
2156 int minor = iminor(inode);
2157 DECLARE_WAITQUEUE(wait, current);
2158 unsigned long flags;
2159 struct list_head *list;
2160 struct sv_state *s;
2161
2162 for (list = devs.next; ; list = list->next) {
2163 if (list == &devs)
2164 return -ENODEV;
2165 s = list_entry(list, struct sv_state, devs);
2166 if (s->dev_midi == minor)
2167 break;
2168 }
2169 VALIDATE_STATE(s);
2170 file->private_data = s;
2171 /* wait for device to become free */
2172 mutex_lock(&s->open_mutex);
2173 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2174 if (file->f_flags & O_NONBLOCK) {
2175 mutex_unlock(&s->open_mutex);
2176 return -EBUSY;
2177 }
2178 add_wait_queue(&s->open_wait, &wait);
2179 __set_current_state(TASK_INTERRUPTIBLE);
2180 mutex_unlock(&s->open_mutex);
2181 schedule();
2182 remove_wait_queue(&s->open_wait, &wait);
2183 set_current_state(TASK_RUNNING);
2184 if (signal_pending(current))
2185 return -ERESTARTSYS;
2186 mutex_lock(&s->open_mutex);
2187 }
2188 spin_lock_irqsave(&s->lock, flags);
2189 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2190 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2191 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2192 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
2193 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2194 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
2195 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
2196 outb(0xff, s->iomidi+1); /* reset command */
2197 outb(0x3f, s->iomidi+1); /* uart command */
2198 if (!(inb(s->iomidi+1) & 0x80))
2199 inb(s->iomidi);
2200 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2201 init_timer(&s->midi.timer);
2202 s->midi.timer.expires = jiffies+1;
2203 s->midi.timer.data = (unsigned long)s;
2204 s->midi.timer.function = sv_midi_timer;
2205 add_timer(&s->midi.timer);
2206 }
2207 if (file->f_mode & FMODE_READ) {
2208 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2209 }
2210 if (file->f_mode & FMODE_WRITE) {
2211 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2212 }
2213 spin_unlock_irqrestore(&s->lock, flags);
2214 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2215 mutex_unlock(&s->open_mutex);
2216 return nonseekable_open(inode, file);
2217 }
2218
2219 static int sv_midi_release(struct inode *inode, struct file *file)
2220 {
2221 struct sv_state *s = (struct sv_state *)file->private_data;
2222 DECLARE_WAITQUEUE(wait, current);
2223 unsigned long flags;
2224 unsigned count, tmo;
2225
2226 VALIDATE_STATE(s);
2227
2228 lock_kernel();
2229 if (file->f_mode & FMODE_WRITE) {
2230 add_wait_queue(&s->midi.owait, &wait);
2231 for (;;) {
2232 __set_current_state(TASK_INTERRUPTIBLE);
2233 spin_lock_irqsave(&s->lock, flags);
2234 count = s->midi.ocnt;
2235 spin_unlock_irqrestore(&s->lock, flags);
2236 if (count <= 0)
2237 break;
2238 if (signal_pending(current))
2239 break;
2240 if (file->f_flags & O_NONBLOCK) {
2241 remove_wait_queue(&s->midi.owait, &wait);
2242 set_current_state(TASK_RUNNING);
2243 unlock_kernel();
2244 return -EBUSY;
2245 }
2246 tmo = (count * HZ) / 3100;
2247 if (!schedule_timeout(tmo ? : 1) && tmo)
2248 printk(KERN_DEBUG "sv: midi timed out??\n");
2249 }
2250 remove_wait_queue(&s->midi.owait, &wait);
2251 set_current_state(TASK_RUNNING);
2252 }
2253 mutex_lock(&s->open_mutex);
2254 s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2255 spin_lock_irqsave(&s->lock, flags);
2256 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2257 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2258 del_timer(&s->midi.timer);
2259 }
2260 spin_unlock_irqrestore(&s->lock, flags);
2261 wake_up(&s->open_wait);
2262 mutex_unlock(&s->open_mutex);
2263 unlock_kernel();
2264 return 0;
2265 }
2266
2267 static /*const*/ struct file_operations sv_midi_fops = {
2268 .owner = THIS_MODULE,
2269 .llseek = no_llseek,
2270 .read = sv_midi_read,
2271 .write = sv_midi_write,
2272 .poll = sv_midi_poll,
2273 .open = sv_midi_open,
2274 .release = sv_midi_release,
2275 };
2276
2277 /* --------------------------------------------------------------------- */
2278
2279 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2280 {
2281 static const unsigned char op_offset[18] = {
2282 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2283 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2284 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2285 };
2286 struct sv_state *s = (struct sv_state *)file->private_data;
2287 struct dm_fm_voice v;
2288 struct dm_fm_note n;
2289 struct dm_fm_params p;
2290 unsigned int io;
2291 unsigned int regb;
2292
2293 switch (cmd) {
2294 case FM_IOCTL_RESET:
2295 for (regb = 0xb0; regb < 0xb9; regb++) {
2296 outb(regb, s->iosynth);
2297 outb(0, s->iosynth+1);
2298 outb(regb, s->iosynth+2);
2299 outb(0, s->iosynth+3);
2300 }
2301 return 0;
2302
2303 case FM_IOCTL_PLAY_NOTE:
2304 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2305 return -EFAULT;
2306 if (n.voice >= 18)
2307 return -EINVAL;
2308 if (n.voice >= 9) {
2309 regb = n.voice - 9;
2310 io = s->iosynth+2;
2311 } else {
2312 regb = n.voice;
2313 io = s->iosynth;
2314 }
2315 outb(0xa0 + regb, io);
2316 outb(n.fnum & 0xff, io+1);
2317 outb(0xb0 + regb, io);
2318 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2319 return 0;
2320
2321 case FM_IOCTL_SET_VOICE:
2322 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2323 return -EFAULT;
2324 if (v.voice >= 18)
2325 return -EINVAL;
2326 regb = op_offset[v.voice];
2327 io = s->iosynth + ((v.op & 1) << 1);
2328 outb(0x20 + regb, io);
2329 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2330 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2331 outb(0x40 + regb, io);
2332 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2333 outb(0x60 + regb, io);
2334 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2335 outb(0x80 + regb, io);
2336 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2337 outb(0xe0 + regb, io);
2338 outb(v.waveform & 0x7, io+1);
2339 if (n.voice >= 9) {
2340 regb = n.voice - 9;
2341 io = s->iosynth+2;
2342 } else {
2343 regb = n.voice;
2344 io = s->iosynth;
2345 }
2346 outb(0xc0 + regb, io);
2347 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2348 (v.connection & 1), io+1);
2349 return 0;
2350
2351 case FM_IOCTL_SET_PARAMS:
2352 if (copy_from_user(&p, (void *__user )arg, sizeof(p)))
2353 return -EFAULT;
2354 outb(0x08, s->iosynth);
2355 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2356 outb(0xbd, s->iosynth);
2357 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2358 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2359 return 0;
2360
2361 case FM_IOCTL_SET_OPL:
2362 outb(4, s->iosynth+2);
2363 outb(arg, s->iosynth+3);
2364 return 0;
2365
2366 case FM_IOCTL_SET_MODE:
2367 outb(5, s->iosynth+2);
2368 outb(arg & 1, s->iosynth+3);
2369 return 0;
2370
2371 default:
2372 return -EINVAL;
2373 }
2374 }
2375
2376 static int sv_dmfm_open(struct inode *inode, struct file *file)
2377 {
2378 int minor = iminor(inode);
2379 DECLARE_WAITQUEUE(wait, current);
2380 struct list_head *list;
2381 struct sv_state *s;
2382
2383 for (list = devs.next; ; list = list->next) {
2384 if (list == &devs)
2385 return -ENODEV;
2386 s = list_entry(list, struct sv_state, devs);
2387 if (s->dev_dmfm == minor)
2388 break;
2389 }
2390 VALIDATE_STATE(s);
2391 file->private_data = s;
2392 /* wait for device to become free */
2393 mutex_lock(&s->open_mutex);
2394 while (s->open_mode & FMODE_DMFM) {
2395 if (file->f_flags & O_NONBLOCK) {
2396 mutex_unlock(&s->open_mutex);
2397 return -EBUSY;
2398 }
2399 add_wait_queue(&s->open_wait, &wait);
2400 __set_current_state(TASK_INTERRUPTIBLE);
2401 mutex_unlock(&s->open_mutex);
2402 schedule();
2403 remove_wait_queue(&s->open_wait, &wait);
2404 set_current_state(TASK_RUNNING);
2405 if (signal_pending(current))
2406 return -ERESTARTSYS;
2407 mutex_lock(&s->open_mutex);
2408 }
2409 /* init the stuff */
2410 outb(1, s->iosynth);
2411 outb(0x20, s->iosynth+1); /* enable waveforms */
2412 outb(4, s->iosynth+2);
2413 outb(0, s->iosynth+3); /* no 4op enabled */
2414 outb(5, s->iosynth+2);
2415 outb(1, s->iosynth+3); /* enable OPL3 */
2416 s->open_mode |= FMODE_DMFM;
2417 mutex_unlock(&s->open_mutex);
2418 return nonseekable_open(inode, file);
2419 }
2420
2421 static int sv_dmfm_release(struct inode *inode, struct file *file)
2422 {
2423 struct sv_state *s = (struct sv_state *)file->private_data;
2424 unsigned int regb;
2425
2426 VALIDATE_STATE(s);
2427 lock_kernel();
2428 mutex_lock(&s->open_mutex);
2429 s->open_mode &= ~FMODE_DMFM;
2430 for (regb = 0xb0; regb < 0xb9; regb++) {
2431 outb(regb, s->iosynth);
2432 outb(0, s->iosynth+1);
2433 outb(regb, s->iosynth+2);
2434 outb(0, s->iosynth+3);
2435 }
2436 wake_up(&s->open_wait);
2437 mutex_unlock(&s->open_mutex);
2438 unlock_kernel();
2439 return 0;
2440 }
2441
2442 static /*const*/ struct file_operations sv_dmfm_fops = {
2443 .owner = THIS_MODULE,
2444 .llseek = no_llseek,
2445 .ioctl = sv_dmfm_ioctl,
2446 .open = sv_dmfm_open,
2447 .release = sv_dmfm_release,
2448 };
2449
2450 /* --------------------------------------------------------------------- */
2451
2452 /* maximum number of devices; only used for command line params */
2453 #define NR_DEVICE 5
2454
2455 static int reverb[NR_DEVICE];
2456
2457 #if 0
2458 static int wavetable[NR_DEVICE];
2459 #endif
2460
2461 static unsigned int devindex;
2462
2463 module_param_array(reverb, bool, NULL, 0);
2464 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2465 #if 0
2466 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2467 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2468 #endif
2469
2470 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2471 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2472 MODULE_LICENSE("GPL");
2473
2474
2475 /* --------------------------------------------------------------------- */
2476
2477 static struct initvol {
2478 int mixch;
2479 int vol;
2480 } initvol[] __devinitdata = {
2481 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2482 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2483 { SOUND_MIXER_WRITE_CD, 0x4040 },
2484 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2485 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2486 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2487 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2488 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2489 { SOUND_MIXER_WRITE_PCM, 0x4040 }
2490 };
2491
2492 #define RSRCISIOREGION(dev,num) (pci_resource_start((dev), (num)) != 0 && \
2493 (pci_resource_flags((dev), (num)) & IORESOURCE_IO))
2494
2495 #ifdef SUPPORT_JOYSTICK
2496 static int __devinit sv_register_gameport(struct sv_state *s, int io_port)
2497 {
2498 struct gameport *gp;
2499
2500 if (!request_region(io_port, SV_EXTENT_GAME, "S3 SonicVibes Gameport")) {
2501 printk(KERN_ERR "sv: gameport io ports are in use\n");
2502 return -EBUSY;
2503 }
2504
2505 s->gameport = gp = gameport_allocate_port();
2506 if (!gp) {
2507 printk(KERN_ERR "sv: can not allocate memory for gameport\n");
2508 release_region(io_port, SV_EXTENT_GAME);
2509 return -ENOMEM;
2510 }
2511
2512 gameport_set_name(gp, "S3 SonicVibes Gameport");
2513 gameport_set_phys(gp, "isa%04x/gameport0", io_port);
2514 gp->dev.parent = &s->dev->dev;
2515 gp->io = io_port;
2516
2517 gameport_register_port(gp);
2518
2519 return 0;
2520 }
2521
2522 static inline void sv_unregister_gameport(struct sv_state *s)
2523 {
2524 if (s->gameport) {
2525 int gpio = s->gameport->io;
2526 gameport_unregister_port(s->gameport);
2527 release_region(gpio, SV_EXTENT_GAME);
2528 }
2529 }
2530 #else
2531 static inline int sv_register_gameport(struct sv_state *s, int io_port) { return -ENOSYS; }
2532 static inline void sv_unregister_gameport(struct sv_state *s) { }
2533 #endif /* SUPPORT_JOYSTICK */
2534
2535 static int __devinit sv_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2536 {
2537 static char __devinitdata sv_ddma_name[] = "S3 Inc. SonicVibes DDMA Controller";
2538 struct sv_state *s;
2539 mm_segment_t fs;
2540 int i, val, ret;
2541 int gpio;
2542 char *ddmaname;
2543 unsigned ddmanamelen;
2544
2545 if ((ret=pci_enable_device(pcidev)))
2546 return ret;
2547
2548 if (!RSRCISIOREGION(pcidev, RESOURCE_SB) ||
2549 !RSRCISIOREGION(pcidev, RESOURCE_ENH) ||
2550 !RSRCISIOREGION(pcidev, RESOURCE_SYNTH) ||
2551 !RSRCISIOREGION(pcidev, RESOURCE_MIDI) ||
2552 !RSRCISIOREGION(pcidev, RESOURCE_GAME))
2553 return -ENODEV;
2554 if (pcidev->irq == 0)
2555 return -ENODEV;
2556 if (pci_set_dma_mask(pcidev, 0x00ffffff)) {
2557 printk(KERN_WARNING "sonicvibes: architecture does not support 24bit PCI busmaster DMA\n");
2558 return -ENODEV;
2559 }
2560 /* try to allocate a DDMA resource if not already available */
2561 if (!RSRCISIOREGION(pcidev, RESOURCE_DDMA)) {
2562 pcidev->resource[RESOURCE_DDMA].start = 0;
2563 pcidev->resource[RESOURCE_DDMA].end = 2*SV_EXTENT_DMA-1;
2564 pcidev->resource[RESOURCE_DDMA].flags = PCI_BASE_ADDRESS_SPACE_IO | IORESOURCE_IO;
2565 ddmanamelen = strlen(sv_ddma_name)+1;
2566 if (!(ddmaname = kmalloc(ddmanamelen, GFP_KERNEL)))
2567 return -1;
2568 memcpy(ddmaname, sv_ddma_name, ddmanamelen);
2569 pcidev->resource[RESOURCE_DDMA].name = ddmaname;
2570 if (pci_assign_resource(pcidev, RESOURCE_DDMA)) {
2571 pcidev->resource[RESOURCE_DDMA].name = NULL;
2572 kfree(ddmaname);
2573 printk(KERN_ERR "sv: cannot allocate DDMA controller io ports\n");
2574 return -EBUSY;
2575 }
2576 }
2577 if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2578 printk(KERN_WARNING "sv: out of memory\n");
2579 return -ENOMEM;
2580 }
2581 memset(s, 0, sizeof(struct sv_state));
2582 init_waitqueue_head(&s->dma_adc.wait);
2583 init_waitqueue_head(&s->dma_dac.wait);
2584 init_waitqueue_head(&s->open_wait);
2585 init_waitqueue_head(&s->midi.iwait);
2586 init_waitqueue_head(&s->midi.owait);
2587 mutex_init(&s->open_mutex);
2588 spin_lock_init(&s->lock);
2589 s->magic = SV_MAGIC;
2590 s->dev = pcidev;
2591 s->iosb = pci_resource_start(pcidev, RESOURCE_SB);
2592 s->ioenh = pci_resource_start(pcidev, RESOURCE_ENH);
2593 s->iosynth = pci_resource_start(pcidev, RESOURCE_SYNTH);
2594 s->iomidi = pci_resource_start(pcidev, RESOURCE_MIDI);
2595 s->iodmaa = pci_resource_start(pcidev, RESOURCE_DDMA);
2596 s->iodmac = pci_resource_start(pcidev, RESOURCE_DDMA) + SV_EXTENT_DMA;
2597 gpio = pci_resource_start(pcidev, RESOURCE_GAME);
2598 pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9); /* enable and use extended mode */
2599 pci_write_config_dword(pcidev, 0x48, s->iodmac | 9); /* enable */
2600 printk(KERN_DEBUG "sv: io ports: %#lx %#lx %#lx %#lx %#x %#x %#x\n",
2601 s->iosb, s->ioenh, s->iosynth, s->iomidi, gpio, s->iodmaa, s->iodmac);
2602 s->irq = pcidev->irq;
2603
2604 /* hack */
2605 pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12); /* wavetable base address */
2606
2607 ret = -EBUSY;
2608 if (!request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM")) {
2609 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2610 goto err_region5;
2611 }
2612 if (!request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA")) {
2613 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2614 goto err_region4;
2615 }
2616 if (!request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC")) {
2617 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2618 goto err_region3;
2619 }
2620 if (!request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi")) {
2621 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2622 goto err_region2;
2623 }
2624 if (!request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth")) {
2625 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2626 goto err_region1;
2627 }
2628
2629 /* initialize codec registers */
2630 outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2631 udelay(50);
2632 outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2633 udelay(50);
2634 outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2635 | (reverb[devindex] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2636 inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2637 wrindir(s, SV_CIDRIVECONTROL, 0); /* drive current 16mA */
2638 wrindir(s, SV_CIENABLE, s->enable = 0); /* disable DMAA and DMAC */
2639 outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2640 /* outb(0xff, s->iodmaa + SV_DMA_RESET); */
2641 /* outb(0xff, s->iodmac + SV_DMA_RESET); */
2642 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2643 wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2644 wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2645 wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2646 setpll(s, SV_CIADCPLLM, 8000);
2647 wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2648 wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2649 wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2650 wrindir(s, SV_CIADCOUTPUT, 0);
2651 /* request irq */
2652 if ((ret=request_irq(s->irq,sv_interrupt,SA_SHIRQ,"S3 SonicVibes",s))) {
2653 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2654 goto err_irq;
2655 }
2656 printk(KERN_INFO "sv: found adapter at io %#lx irq %u dmaa %#06x dmac %#06x revision %u\n",
2657 s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2658 /* register devices */
2659 if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0) {
2660 ret = s->dev_audio;
2661 goto err_dev1;
2662 }
2663 if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0) {
2664 ret = s->dev_mixer;
2665 goto err_dev2;
2666 }
2667 if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0) {
2668 ret = s->dev_midi;
2669 goto err_dev3;
2670 }
2671 if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0) {
2672 ret = s->dev_dmfm;
2673 goto err_dev4;
2674 }
2675 pci_set_master(pcidev); /* enable bus mastering */
2676 /* initialize the chips */
2677 fs = get_fs();
2678 set_fs(KERNEL_DS);
2679 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2680 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2681 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2682 val = initvol[i].vol;
2683 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2684 }
2685 set_fs(fs);
2686 /* register gameport */
2687 sv_register_gameport(s, gpio);
2688 /* store it in the driver field */
2689 pci_set_drvdata(pcidev, s);
2690 /* put it into driver list */
2691 list_add_tail(&s->devs, &devs);
2692 /* increment devindex */
2693 if (devindex < NR_DEVICE-1)
2694 devindex++;
2695 return 0;
2696
2697 err_dev4:
2698 unregister_sound_midi(s->dev_midi);
2699 err_dev3:
2700 unregister_sound_mixer(s->dev_mixer);
2701 err_dev2:
2702 unregister_sound_dsp(s->dev_audio);
2703 err_dev1:
2704 printk(KERN_ERR "sv: cannot register misc device\n");
2705 free_irq(s->irq, s);
2706 err_irq:
2707 release_region(s->iosynth, SV_EXTENT_SYNTH);
2708 err_region1:
2709 release_region(s->iomidi, SV_EXTENT_MIDI);
2710 err_region2:
2711 release_region(s->iodmac, SV_EXTENT_DMA);
2712 err_region3:
2713 release_region(s->iodmaa, SV_EXTENT_DMA);
2714 err_region4:
2715 release_region(s->ioenh, SV_EXTENT_ENH);
2716 err_region5:
2717 kfree(s);
2718 return ret;
2719 }
2720
2721 static void __devexit sv_remove(struct pci_dev *dev)
2722 {
2723 struct sv_state *s = pci_get_drvdata(dev);
2724
2725 if (!s)
2726 return;
2727 list_del(&s->devs);
2728 outb(~0, s->ioenh + SV_CODEC_INTMASK); /* disable ints */
2729 synchronize_irq(s->irq);
2730 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2731 wrindir(s, SV_CIENABLE, 0); /* disable DMAA and DMAC */
2732 /*outb(0, s->iodmaa + SV_DMA_RESET);*/
2733 /*outb(0, s->iodmac + SV_DMA_RESET);*/
2734 free_irq(s->irq, s);
2735 sv_unregister_gameport(s);
2736 release_region(s->iodmac, SV_EXTENT_DMA);
2737 release_region(s->iodmaa, SV_EXTENT_DMA);
2738 release_region(s->ioenh, SV_EXTENT_ENH);
2739 release_region(s->iomidi, SV_EXTENT_MIDI);
2740 release_region(s->iosynth, SV_EXTENT_SYNTH);
2741 unregister_sound_dsp(s->dev_audio);
2742 unregister_sound_mixer(s->dev_mixer);
2743 unregister_sound_midi(s->dev_midi);
2744 unregister_sound_special(s->dev_dmfm);
2745 kfree(s);
2746 pci_set_drvdata(dev, NULL);
2747 }
2748
2749 static struct pci_device_id id_table[] = {
2750 { PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2751 { 0, }
2752 };
2753
2754 MODULE_DEVICE_TABLE(pci, id_table);
2755
2756 static struct pci_driver sv_driver = {
2757 .name = "sonicvibes",
2758 .id_table = id_table,
2759 .probe = sv_probe,
2760 .remove = __devexit_p(sv_remove),
2761 };
2762
2763 static int __init init_sonicvibes(void)
2764 {
2765 printk(KERN_INFO "sv: version v0.31 time " __TIME__ " " __DATE__ "\n");
2766 #if 0
2767 if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2768 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2769 #endif
2770 return pci_register_driver(&sv_driver);
2771 }
2772
2773 static void __exit cleanup_sonicvibes(void)
2774 {
2775 printk(KERN_INFO "sv: unloading\n");
2776 pci_unregister_driver(&sv_driver);
2777 if (wavetable_mem)
2778 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2779 }
2780
2781 module_init(init_sonicvibes);
2782 module_exit(cleanup_sonicvibes);
2783
2784 /* --------------------------------------------------------------------- */
2785
2786 #ifndef MODULE
2787
2788 /* format is: sonicvibes=[reverb] sonicvibesdmaio=dmaioaddr */
2789
2790 static int __init sonicvibes_setup(char *str)
2791 {
2792 static unsigned __initdata nr_dev = 0;
2793
2794 if (nr_dev >= NR_DEVICE)
2795 return 0;
2796 #if 0
2797 if (get_option(&str, &reverb[nr_dev]) == 2)
2798 (void)get_option(&str, &wavetable[nr_dev]);
2799 #else
2800 (void)get_option(&str, &reverb[nr_dev]);
2801 #endif
2802
2803 nr_dev++;
2804 return 1;
2805 }
2806
2807 __setup("sonicvibes=", sonicvibes_setup);
2808
2809 #endif /* MODULE */
USB Experimental Work