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[unleashed.git] / include / sys / audio / ac97.h
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1 /*
2 * CDDL HEADER START
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
19 * CDDL HEADER END
23 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
26 #ifndef _SYS_AC97_H
27 #define _SYS_AC97_H
29 #include <sys/types.h>
30 #include <sys/audio/audio_common.h>
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
36 #ifdef _KERNEL
39 * This header file describes the AC-97 Codec register set. See the
40 * spec for a detailed description of each register.
44 * Defines for the registers.
47 /* Reset Register Index 00h */
48 #define AC97_RESET_REGISTER 0x00
49 #define RR_DEDICATED_MIC 0x0001
50 #define RR_RESERVED 0x0002
51 #define RR_BASS_TREBLE 0x0004
52 #define RR_PSEUDO_STEREO 0x0008
53 #define RR_HEADPHONE_SUPPORT 0x0010
54 #define RR_LOUDNESS_SUPPORT 0x0020
55 #define RR_18_BIT_DAC 0x0040
56 #define RR_20_BIT_DAC 0x0080
57 #define RR_18_BIT_ADC 0x0100
58 #define RR_20_BIT_ADC 0x0200
59 #define RR_3D_STEREO_ENHANCE_MASK 0x7c00
61 /* Master Volume Register Index 02h */
62 #define AC97_MASTER_VOLUME_REGISTER 0x02
63 #define MVR_RIGHT_MASK 0x001f
64 #define MVR_RIGHT_0dB_ATTEN 0x0000
65 #define MVR_RIGHT_OPTIONAL_MASK 0x003f
66 #define MVR_LEFT_MASK 0x1f00
67 #define MVR_LEFT_0dB_ATTEN 0x0000
68 #define MVR_LEFT_OPTIONAL_MASK 0x3f00
69 #define MVR_MUTE 0x8000
71 /* Headphone Volume Register Index 04h - Optional */
72 #define AC97_HEADPHONE_VOLUME_REGISTER 0x04
73 #define HPVR_RIGHT_MASK 0x001f
74 #define HPVR_RIGHT_0dB_ATTEN 0x0000
75 #define HPVR_RIGHT_OPTIONAL_MASK 0x003f
76 #define HPVR_LEFT_MASK 0x1f00
77 #define HPVR_LEFT_0dB_ATTEN 0x0000
78 #define HPVR_LEFT_OPTIONAL_MASK 0x3f00
79 #define HPVR_MUTE 0x8000
81 /* Mono Master Volume Register Index 06h - Optional */
82 #define AC97_MONO_MASTER_VOLUME_REGISTER 0x06
83 #define MMVR_MASK 0x001f
84 #define MMVR_0dB_ATTEN 0x0000
85 #define MMVR_OPTIONAL_MASK 0x003f
86 #define MMVR_MUTE 0x8000
88 /* Master Tone Control Register Index 08h - Optional */
89 #define AC97_MASTER_TONE_CONTROL_REGISTER 0x08
90 #define MTCR_TREBLE_MASK 0x000e
91 #define MTCR_TREBLE_OPTIONAL_MASK 0x000f
92 #define MTCR_TREBLE_BYPASS 0x000f
93 #define MTCR_BASS_MASK 0x0e00
94 #define MTCR_BASS_OPTIONAL_MASK 0x0f00
95 #define MTCR_BASS_BYPASS 0x0f00
97 /* PC Beep Register Index 0ah - Optional */
98 #define AC97_PC_BEEP_REGISTER 0x0a
99 #define PCBR_VOLUME_MASK 0x001e
100 #define PCBR_0dB_ATTEN 0x0000
101 #define PCBR_MUTE 0x8000
103 /* Phone Volume Register Index 0ch - Optional */
104 #define AC97_PHONE_VOLUME_REGISTER 0x0c
105 #define PVR_GAIN_MASK 0x001f
106 #define PVR_0dB_GAIN 0x0010
107 #define PVR_MAX_ATTEN 0x001f
108 #define PVR_MUTE 0x8000
110 /* Mic Volume Register Index 0eh */
111 #define AC97_MIC_VOLUME_REGISTER 0x0e
112 #define MICVR_GAIN_MASK 0x001f
113 #define MICVR_0dB_GAIN 0x0008
114 #define MICVR_MAX_ATTEN 0x001f
115 #define MICVR_20dB_BOOST 0x0040
116 #define MICVR_20dB_NOBOOST 0x0000
117 #define MICVR_MUTE 0x8000
119 /* Line In Volume Register Index 10h */
120 #define AC97_LINE_IN_VOLUME_REGISTER 0x10
121 #define LIVR_RIGHT_GAIN_MASK 0x001f
122 #define LIVR_RIGHT_0dB_GAIN 0x0010
123 #define LIVR_RIGHT_MAX_ATTEN 0x001f
124 #define LIVR_LEFT_GAIN_MASK 0x1f00
125 #define LIVR_LEFT_0dB_GAIN 0x1000
126 #define LIVR_LEFT_MAX_ATTEN 0x1f00
127 #define LIVR_MUTE 0x8000
129 /* CD Volume Register Index 12h */
130 #define AC97_CD_VOLUME_REGISTER 0x12
131 #define CDVR_RIGHT_GAIN_MASK 0x001f
132 #define CDVR_RIGHT_0dB_GAIN 0x0010
133 #define CDVR_RIGHT_MAX_ATTEN 0x001f
134 #define CDVR_LEFT_GAIN_MASK 0x1f00
135 #define CDVR_LEFT_0dB_GAIN 0x1000
136 #define CDVR_LEFT_MAX_ATTEN 0x1f00
137 #define CDVR_MUTE 0x8000
139 /* Video Volume Register Index 14h - Optional */
140 #define AC97_VIDEO_VOLUME_REGISTER 0x14
141 #define VIDVR_RIGHT_GAIN_MASK 0x001f
142 #define VIDVR_RIGHT_0dB_GAIN 0x0010
143 #define VIDVR_RIGHT_MAX_ATTEN 0x001f
144 #define VIDVR_LEFT_GAIN_MASK 0x1f00
145 #define VIDVR_LEFT_0dB_GAIN 0x1000
146 #define VIDVR_LEFT_MAX_ATTEN 0x1f00
147 #define VIDVR_MUTE 0x8000
149 /* Aux Volume Register Index 16h - Optional */
150 #define AC97_AUX_VOLUME_REGISTER 0x16
151 #define AUXVR_RIGHT_GAIN_MASK 0x001f
152 #define AUXVR_RIGHT_0dB_GAIN 0x0010
153 #define AUXVR_RIGHT_MAX_ATTEN 0x001f
154 #define AUXVR_LEFT_GAIN_MASK 0x1f00
155 #define AUXVR_LEFT_0dB_GAIN 0x1000
156 #define AUXVR_LEFT_MAX_ATTEN 0x1f00
157 #define AUXVR_MUTE 0x8000
159 /* PCM Out Volume Register Index 18h */
160 #define AC97_PCM_OUT_VOLUME_REGISTER 0x18
161 #define PCMOVR_RIGHT_GAIN_MASK 0x001f
162 #define PCMOVR_RIGHT_0dB_GAIN 0x0010
163 #define PCMOVR_RIGHT_MAX_ATTEN 0x001f
164 #define PCMOVR_LEFT_GAIN_MASK 0x1f00
165 #define PCMOVR_LEFT_0dB_GAIN 0x1000
166 #define PCMOVR_LEFT_MAX_ATTEN 0x1f00
167 #define PCMOVR_MUTE 0x8000
168 #define PCMOVR_GAIN_BITS 5
170 /* Record Select Control Register Index 1ah */
171 #define AC97_RECORD_SELECT_CTRL_REGISTER 0x1a
172 #define RSCR_R_MIC 0x0000
173 #define RSCR_R_CD 0x0001
174 #define RSCR_R_VIDEO 0x0002
175 #define RSCR_R_AUX 0x0003
176 #define RSCR_R_LINE_IN 0x0004
177 #define RSCR_R_STEREO_MIX 0x0005
178 #define RSCR_R_MONO_MIX 0x0006
179 #define RSCR_R_PHONE 0x0007
180 #define RSCR_L_MIC 0x0000
181 #define RSCR_L_CD 0x0100
182 #define RSCR_L_VIDEO 0x0200
183 #define RSCR_L_AUX 0x0300
184 #define RSCR_L_LINE_IN 0x0400
185 #define RSCR_L_STEREO_MIX 0x0500
186 #define RSCR_L_MONO_MIX 0x0600
187 #define RSCR_L_PHONE 0x0700
189 /* Record Gain Register Index 1ch */
190 #define AC97_RECORD_GAIN_REGISTER 0x1c
191 #define RGR_RIGHT_MASK 0x000f
192 #define RGR_RIGHT_0db_GAIN 0x0000
193 #define RGR_RIGHT_MAX_GAIN 0x000f
194 #define RGR_LEFT_MASK 0x0f00
195 #define RGR_LEFT_0db_GAIN 0x0000
196 #define RGR_LEFT_MAX_GAIN 0x0f00
197 #define RGR_MUTE 0x8000
199 /* Record Gain Mic Register Index 1eh - Optional */
200 #define AC97_RECORD_GAIN_MIC_REGISTER 0x1e
201 #define RGMR_MASK 0x000f
202 #define RGMR_MUTE 0x8000
203 #define RGMR_MASK 0x000f
204 #define RGMR_0db_GAIN 0x0000
205 #define RGMR_MAX_GAIN 0x000f
207 /* General Purpose Register Index 20h - Optional */
208 #define AC97_GENERAL_PURPOSE_REGISTER 0x20
209 #define GPR_LPBK 0x0080
210 #define GPR_MS_MIC1 0x0000
211 #define GPR_MS_MIC2 0x0100
212 #define GPR_MONO_MIX_IN 0x0000
213 #define GPR_MONO_MIC_IN 0x0200
214 #define GPR_BASS_BOOST 0x1000
215 #define GPR_3D_STEREO_ENHANCE 0x2000
216 #define GPR_ST 0x4000
217 #define GPR_POP_PRE_3D 0x0000
218 #define GPR_POP_POST_3D 0x8000
220 /* 3D Control Regsiter Index 22h - Optional */
221 #define AC97_THREE_D_CONTROL_REGISTER 0x22
222 #define TDCR_DEPTH_MASK 0x000f
223 #define TDCR_CENTER_MASK 0x0f00
224 #define TDCR_NULL 0x0000
226 /* Audio Interrupt and Paging Mechanism Index 24h - r2.3 */
227 #define AC97_INTERRUPT_PAGING_REGISTER 0x24
228 #define IPR_IS 0x8000
229 #define IPR_CAUSE_MASK 0x6000
230 #define IPR_SC 0x1000
231 #define IPR_IE 0x0800
232 #define IPR_PG_MASK 0x000f
234 /* Powerdown Control Status Register Index 26h */
235 #define AC97_POWERDOWN_CTRL_STAT_REGISTER 0x26
236 #define PCSR_ADC 0x0001
237 #define PCSR_DAC 0x0002
238 #define PCSR_ANL 0x0004
239 #define PCSR_REF 0x0008
240 #define PCSR_POWERD_UP (PCSR_ADC|PCSR_DAC|\
241 PCSR_ANL|PCSR_REF)
242 #define PCSR_PR0 0x0100
243 #define PCSR_PR1 0x0200
244 #define PCSR_PR2 0x0400
245 #define PCSR_PR3 0x0800
246 #define PCSR_PR4 0x1000
247 #define PCSR_PR5 0x2000
248 #define PCSR_PR6 0x4000
249 #define PCSR_EAPD 0x8000
251 /* Extended Audio Register Index 28h - Optional */
252 #define AC97_EXTENDED_AUDIO_REGISTER 0x28
253 #define EAR_VRA 0x0001
254 #define EAR_DRA 0x0002
255 #define EAR_SPDIF 0x0004
256 #define EAR_VRM 0x0008
257 #define EAR_DSA_MASK 0x0030
258 #define EAR_CDAC 0x0040
259 #define EAR_SDAC 0x0080
260 #define EAR_LDAC 0x0100
261 #define EAR_AMAP 0x0200
262 #define EAR_REV_MASK 0x0c00
263 #define EAR_REV_21 0x0000
264 #define EAR_REV_22 0x0400
265 #define EAR_REV_23 0x0800
266 #define EAR_PRIMARY_CODEC 0x0000
267 #define EAR_SECONDARY_01_CODEC 0x4000
268 #define EAR_SECONDARY_10_CODEC 0x8000
269 #define EAR_SECONDARY_11_CODEC 0xc000
271 /* Extended Audio Status and Control Register Index 2ah - Optional */
272 #define AC97_EXTENDED_AUDIO_STAT_CTRL_REGISTER 0x2a
273 #define EASCR_VRA 0x0001
274 #define EASCR_DRA 0x0002
275 #define EASCR_SPDIF 0x0004
276 #define EASCR_VRM 0x0008
277 #define EASCR_SPSA_MASK 0x0030
278 #define EASCR_SPSA_3_4 0x0000
279 #define EASCR_SPSA_7_8 0x0010
280 #define EASCR_SPSA_6_9 0x0020
281 #define EASCR_SPSA_10_11 0x0030
282 #define EASCR_CDAC 0x0040
283 #define EASCR_SDAC 0x0080
284 #define EASCR_LDAC 0x0100
285 #define EASCR_MADC 0x0200
286 #define EASCR_SPCV 0x0400
287 #define EASCR_PRI 0x0800
288 #define EASCR_PRJ 0x1000
289 #define EASCR_PRK 0x2000
290 #define EASCR_PRL 0x4000
291 #define EASCR_VCFG 0x8000
293 /* Extended Front DAC Rate Register 2ch - Optional */
294 #define AC97_EXTENDED_FRONT_DAC_RATE_REGISTER 0x2c
295 #define AC97_SAMPLE_RATE_48000 0xbb80
297 /* Extended Surround DAC Rate Register 2eh - Optional */
298 #define AC97_EXTENDED_SURROUND_DAC_RATE_REGISTER 0x2e
300 /* Extended LFE DAC Rate Register 30h - Optional */
301 #define AC97_EXTENDED_LFE_DAC_RATE_REGISTER 0x30
303 /* Extended LR DAC Rate Register 32h - Optional */
304 #define AC97_EXTENDED_LR_DAC_RATE_REGISTER 0x32
306 /* Extended Mic ADC Rate Register 34h - Optional */
307 #define AC97_EXTENDED_MIC_ADC_RATE_REGISTER 0x34
309 /* Extended Center and LFE Volume Register 36h - Optional */
310 #define AC97_EXTENDED_C_LFE_VOLUME_REGISTER 0x36
311 #define EXLFEVR_CENTER_MASK 0x001f
312 #define EXLFEVR_CENTER_OPTIONAL_MASK 0x003f
313 #define EXLFEVR_CENTER_MUTE 0x0080
314 #define EXLFEVR_LFE_MASK 0x1f00
315 #define EXLFEVR_LFE_OPTIONAL_MASK 0x3f00
316 #define EXLFEVR_LFE_MUTE 0x8000
318 /* Extended Left and Right Surround Volume Register 38h - Optional */
319 #define AC97_EXTENDED_LRS_VOLUME_REGISTER 0x38
320 #define EXLFEVR_RIGHT_MASK 0x001f
321 #define EXLFEVR_RIGHT_OPTIONAL_MASK 0x003f
322 #define EXLFEVR_RIGHT_MTUE 0x0080
323 #define EXLFEVR_LEFT_MASK 0x1f00
324 #define EXLFEVR_LEFT_OPTIONAL_MASK 0x3f00
325 #define EXLFEVR_LEFT_MUTE 0x8000
327 /* S/PDIF Control Register 3ah - Optional */
328 #define AC97_SPDIF_CONTROL_REGISTER 0x3a
329 #define SPCR_PRO 0x0001
330 #define SPCR_AUDIO 0x0002
331 #define SPCR_COPY 0x0004
332 #define SPCR_PRE 0x0008
333 #define SPCR_CC_MASK 0x07f0
334 #define SPCR_L 0x0800
335 #define SPCR_SPSR_MASK 0x3000
336 #define SPCR_SPSR_44100 0x0000
337 #define SPCR_SPSR_48000 0x2000
338 #define SPCR_SPSR_32000 0x3000
339 #define SPCR_DRS 0x4000
340 #define SPCR_V 0x8000
343 * Modem only registers from 3ch - 58h.
346 /* Extended Modem ID Register 3ch - Optional */
347 #define AC97_EXTENDED_MODEM_ID_REGISTER 0x3c
348 #define EMIDR_LINE1 0x0001
349 #define EMIDR_LINE2 0x0002
350 #define EMIDR_HSET 0x0004
351 #define EMIDR_CID1 0x0008
352 #define EMIDR_CID2 0x0010
353 #define EMIDR_PRIMARY_CODEC 0x0000
354 #define EMIDR_SECONDARY_01_CODEC 0x4000
355 #define EMIDR_SECONDARY_10_CODEC 0x8000
356 #define EMIDR_SECONDARY_11_CODEC 0xc000
358 /* Extended Modem Status and Control Register 3eh - Optional */
359 #define AC97_EXTENDED_MODE_STAT_CTRL_REGISTER 0x3e
360 #define EMSCR_BPIO 0x0001
361 #define EMSCR_MREF 0x0002
362 #define EMSCR_ADC1 0x0004
363 #define EMSCR_DAC1 0x0008
364 #define EMSCR_ADC2 0x0010
365 #define EMSCR_DAC2 0x0020
366 #define EMSCR_HADC 0x0040
367 #define EMSCR_HDAC 0x0080
368 #define EMSCR_PRA 0x0100
369 #define EMSCR_PRB 0x0200
370 #define EMSCR_PRC 0x0400
371 #define EMSCR_PRD 0x0800
372 #define EMSCR_PRE 0x1000
373 #define EMSCR_PRF 0x2000
374 #define EMSCR_PRG 0x4000
375 #define EMSCR_PRH 0x8000
377 /* Extended Modem Line 1 DAC/ADC Sample Rate Register 40h - Optional */
378 #define AC97_EXTENDED_MODEM_LINE1_RATE_REGISTER 0x40
380 /* Extended Modem Line 2 DAC/ADC Sample Rate Register 42h - Optional */
381 #define AC97_EXTENDED_MODEM_LINE2_RATE_REGISTER 0x42
383 /* Extended Modem Handset Sample Rate Register 44h - Optional */
384 #define AC97_EXTENDED_MODEM_HANDSET_RATE_REGISTER 0x44
386 /* Extended Modem Line 1 DAC/ADC Level Register 46h - Optional */
387 #define AC97_EXTENDED_MODEM_LINE1_LEVEL_REGISTER 0x46
388 #define EML1LR_ADC_LEVEL_MASK 0x000f
389 #define EML1LR_ADC_LEVEL_MUTE 0x0080
390 #define EML1LR_DAC_LEVEL_MASK 0x0f00
391 #define EML1LR_DAC_LEVEL_MUTE 0x8000
393 /* Extended Modem Line 2 DAC/ADC Level Register 48h - Optional */
394 #define AC97_EXTENDED_MODEM_LINE2_LEVEL_REGISTER 0x48
395 #define EML2LR_ADC_LEVEL_MASK 0x000f
396 #define EML2LR_ADC_LEVEL_MUTE 0x0080
397 #define EML2LR_DAC_LEVEL_MASK 0x0f00
398 #define EML2LR_DAC_LEVEL_MUTE 0x8000
400 /* Extended Modem Handset DAC/ADC Level Register 4ah - Optional */
401 #define AC97_EXTENDED_MODEM_HANDSET_LEVEL_REGISTER 0x4a
402 #define EMHLR_ADC_LEVEL_MASK 0x000f
403 #define EMHLR_ADC_LEVEL_MUTE 0x0080
404 #define EMHLR_DAC_LEVEL_MASK 0x0f00
405 #define EMHLR_DAC_LEVEL_MUTE 0x8000
407 /* Extended Modem GPIO Pin Configuration Register 4ch - Optional */
408 #define AC97_EXTENDED_MODEM_GPIO_PIN_REGISTER 0x4c
410 /* Extended Modem GPIO Pin Polarity Register 4eh - Optional */
411 #define AC97_EXTENDED_MODEM_GPIO_POLARITY_REGISTER 0x4e
413 /* Extended Modem GPIO Pin Sticky Register 50h - Optional */
414 #define AC97_EXTENDED_MODEM_GPIO_STICKY_REGISTER 0x50
416 /* Extended Modem GPIO Pin Wake-up Mask Register 52h - Optional */
417 #define AC97_EXTENDED_MODEM_GPIO_WAKEUP_REGISTER 0x52
419 /* Extended Modem GPIO Pin Status Mask Register 54h - Optional */
420 #define AC97_EXTENDED_MODEM_GPIO_STATUS_REGISTER 0x54
422 /* Extended Modem AFE Status and Control Register 56h - Optional */
423 #define AC97_EXTENDED_MODEM_AFE_STAT_CTRL_REGISTER 0x56
424 #define EMAFESCR_L1B0 0x0001
425 #define EMAFESCR_L1B1 0x0002
426 #define EMAFESCR_L1B2 0x0004
427 #define EMAFESCR_L2B0 0x0010
428 #define EMAFESCR_L2B1 0x0020
429 #define EMAFESCR_L2B2 0x0040
430 #define EMAFESCR_HSB0 0x0100
431 #define EMAFESCR_HSB1 0x0200
432 #define EMAFESCR_HSB2 0x0400
433 #define EMAFESCR_MLINK_ON 0x0000
434 #define EMAFESCR_MLINK_OFF 0x1000
435 #define EMAFESCR_CIDR 0x2000
436 #define EMAFESCR_CID1 0x4000
437 #define EMAFESCR_CID2 0x8000
439 /* Vendor Reserved Registers 5ah - 7ah - Optional */
441 * Note that 60h - 6eh is also defined as the extended codec page area in
442 * AC'97 r2.3.
444 #define AC97_VENDOR_REGISTER_01 0x5a
445 #define AC97_VENDOR_REGISTER_02 0x5c
446 #define AC97_VENDOR_REGISTER_03 0x5e
447 #define AC97_VENDOR_REGISTER_04 0x60
448 #define AC97_VENDOR_REGISTER_05 0x62
449 #define AC97_VENDOR_REGISTER_06 0x64
450 #define AC97_VENDOR_REGISTER_07 0x66
451 #define AC97_VENDOR_REGISTER_08 0x68
452 #define AC97_VENDOR_REGISTER_09 0x6a
453 #define AC97_VENDOR_REGISTER_10 0x6c
454 #define AC97_VENDOR_REGISTER_11 0x6e
455 #define AC97_VENDOR_REGISTER_12 0x70
456 #define AC97_VENDOR_REGISTER_13 0x72
457 #define AC97_VENDOR_REGISTER_14 0x74
458 #define AC97_VENDOR_REGISTER_15 0x76
459 #define AC97_VENDOR_REGISTER_16 0x78
460 #define AC97_VENDOR_REGISTER_17 0x7a
463 * Page 01 Extended Codec Registers
465 #define AC97_PAGE01_CODEC_CLASS_REV_REGISTER 0x60
466 #define AC97_PAGE01_PCI_SVID_REGISTER 0x62
467 #define AC97_PAGE01_PCI_SID_REGISTER 0x64
468 #define AC97_PAGE01_FUNCTION_SELECT_REGISTER 0x66
469 #define AC97_PAGE01_FUNCTION_INFORMATION_REGISTER 0x68
470 #define AC97_PAGE01_SENSE_DETAILS_REGISTER 0x6a
471 #define AC97_PAGE01_DAC_SLOT_MAPPING_REGISTER 0x6c
472 #define AC97_PAGE01_ADC_SLOT_MAPPING_REGISTER 0x6e
474 /* Vendor ID1 Register 7ch */
475 #define AC97_VENDOR_ID1_REGISTER 0x7c
476 #define VID1R_CHAR2_MASK 0x00ff
477 #define VID1R_CHAR1_MASK 0xff00
479 /* Vendor ID2 Register 7eh */
480 #define AC97_VENDOR_ID2_REGISTER 0x7e
481 #define VID2R_REVISION_MASK 0x00ff
482 #define VID2R_CHAR3_MASK 0xff00
485 * Property names used by AC97. We should probably have a better way
486 * of dealing with some of these. (LINEIN_FUNC and MIC_FUNC should really
487 * be saved/restored with other global settings.)
489 #define AC97_PROP_AMPLIFIER "ac97-amplifier"
490 #define AC97_PROP_SPEAKER "ac97-speaker"
491 #define AC97_PROP_MICBOOST "ac97-micboost"
492 #define AC97_PROP_NO_HEADPHONE "ac97-no-headphone"
493 #define AC97_PROP_NO_AUXOUT "ac97-no-auxout"
494 #define AC97_PROP_NO_CDROM "ac97-no-cdrom"
495 #define AC97_PROP_NO_VIDEO "ac97-no-video"
496 #define AC97_PROP_NO_AUXIN "ac97-no-auxin"
497 #define AC97_PROP_NO_MIC "ac97-no-mic"
498 #define AC97_PROP_NO_LINEIN "ac97-no-linein"
499 #define AC97_PROP_LINEIN_FUNC "ac97-linein-function" /* 1=linein, 2=surr */
500 #define AC97_PROP_MIC_FUNC "ac97-mic-function" /* 1=mic, 2=cen/lfe */
501 #define AC97_PROP_DOWNMIX "ac97-downmix"
502 #define AC97_PROP_SPREAD "ac97-spread"
505 * Known Codec vendors.
507 #define AC97_VENDOR_ADS 0x41445300 /* Analog Devices */
508 #define AC97_VENDOR_AKM 0x414b4d00 /* Asahi Kasei */
509 #define AC97_VENDOR_ALC 0x414c4300 /* Realtek */
510 #define AC97_VENDOR_ALG 0x414c4700 /* Realtek */
511 #define AC97_VENDOR_CMI 0x434d4900 /* Cmedia */
512 #define AC97_VENDOR_CRY 0x43525900 /* Cirrus Logic */
513 #define AC97_VENDOR_CXT 0x43585400 /* Conexant */
514 #define AC97_VENDOR_EMC 0x454d4300 /* eMicro */
515 #define AC97_VENDOR_EV 0x000f8300 /* Ectiva */
516 #define AC97_VENDOR_ESS 0x45838300 /* ESS */
517 #define AC97_VENDOR_HRS 0x48525300 /* Intersil */
518 #define AC97_VENDOR_ICE 0x49434500 /* ICEnsemble */
519 #define AC97_VENDOR_ITE 0x49544500 /* ITE */
520 #define AC97_VENDOR_NSC 0x4e534300 /* National */
521 #define AC97_VENDOR_PSC 0x50534300 /* Philips */
522 #define AC97_VENDOR_SIL 0x53494c00 /* Silicon Labs */
523 #define AC97_VENDOR_ST 0x83847600 /* SigmaTel */
524 #define AC97_VENDOR_TRA 0x54524100 /* TriTech */
525 #define AC97_VENDOR_TXN 0x54584e00 /* TI */
526 #define AC97_VENDOR_VIA 0x56494100 /* VIA */
527 #define AC97_VENDOR_WML 0x574d4c00 /* Wolfson */
528 #define AC97_VENDOR_YMH 0x594d4800 /* Yamaha */
531 * Known Codec IDs.
533 #define AC97_CODEC_AD1819B 0x41445303
534 #define AC97_CODEC_AD1881 0x41445340
535 #define AC97_CODEC_AD1881A 0x41445348
536 #define AC97_CODEC_AD1885 0x41445360
537 #define AC97_CODEC_AD1886 0x41445361
538 #define AC97_CODEC_AD1887 0x41445362
539 #define AC97_CODEC_AD1888 0x41445368
540 #define AC97_CODEC_AD1980 0x41445370
541 #define AC97_CODEC_AD1981A 0x41445371
542 #define AC97_CODEC_AD1981 0x41445372
543 #define AC97_CODEC_AD1981B 0x41445374
544 #define AC97_CODEC_AD1985 0x41445375
545 #define AC97_CODEC_AK4540 0x414b4d00
546 #define AC97_CODEC_ALC100 0x414c4326
547 #define AC97_CODEC_ALC200P 0x414c4710
548 #define AC97_CODEC_ALC202 0x414c4740
549 #define AC97_CODEC_ALC203 0x414c4770
550 #define AC97_CODEC_ALC250 0x414c4750
551 #define AC97_CODEC_ALC250_2 0x414c4752
552 #define AC97_CODEC_ALC650 0x414c4720
553 #define AC97_CODEC_ALC655 0x414c4760
554 #define AC97_CODEC_ALC658 0x414c4780
555 #define AC97_CODEC_ALC850 0x414c4790
556 #define AC97_CODEC_CMI9738 0x434d4941
557 #define AC97_CODEC_CMI9739 0x434d4961
558 #define AC97_CODEC_CMI9780 0x434d4969
559 #define AC97_CODEC_CMI9761 0x434d4978
560 #define AC97_CODEC_CMI9761_2 0x434d4982
561 #define AC97_CODEC_CMI9761_3 0x434d4983
562 #define AC97_CODEC_CS4202 0x43525970
563 #define AC97_CODEC_CS4205 0x43525950
564 #define AC97_CODEC_CS4294 0x43525920
565 #define AC97_CODEC_CS4297 0x43525900
566 #define AC97_CODEC_CS4297A 0x43525910
567 #define AC97_CODEC_CS4299 0x43525930
568 #define AC97_CODEC_CX20468 0x43585428
569 #define AC97_CODEC_CX20468_2 0x43585429
570 #define AC97_CODEC_CX20468_21 0x43585430
571 #define AC97_CODEC_EM28028 0x454d4328
572 #define AC97_CODEC_ES1921 0x45838308
573 #define AC97_CODEC_EV1938 0x000f8384
574 #define AC97_CODEC_ICE1232 0x49434511
575 #define AC97_CODEC_LM4550 0x4e534350
576 #define AC97_CODEC_STAC9700 0x83847600
577 #define AC97_CODEC_STAC9701 0x83847601
578 #define AC97_CODEC_STAC9701_2 0xc250c250
579 #define AC97_CODEC_STAC9704 0x83847604
580 #define AC97_CODEC_STAC9705 0x83847605
581 #define AC97_CODEC_STAC9708 0x83847608
582 #define AC97_CODEC_STAC9721 0x83847609
583 #define AC97_CODEC_STAC9744 0x83847644
584 #define AC97_CODEC_STAC9750 0x83847650
585 #define AC97_CODEC_STAC9752 0x83847652
586 #define AC97_CODEC_STAC9756 0x83847656
587 #define AC97_CODEC_STAC9758 0x83847658
588 #define AC97_CODEC_STAC9766 0x83847666
589 #define AC97_CODEC_TR28023 0x54524103
590 #define AC97_CODEC_TR28023_2 0x54524123
591 #define AC97_CODEC_TR28028 0x54524108
592 #define AC97_CODEC_TR28028_2 0x54524128
593 #define AC97_CODEC_VT1612A 0x56494161
594 #define AC97_CODEC_VT1617A 0x56494170
595 #define AC97_CODEC_VT1616 0x49434551
596 #define AC97_CODEC_VT1616A 0x49434552
597 #define AC97_CODEC_VT1618 0x56494182
598 #define AC97_CODEC_WM9701A 0x574d4c00
599 #define AC97_CODEC_WM9703 0x574d4c03
600 #define AC97_CODEC_WM9704 0x574d4c04
601 #define AC97_CODEC_YMF743 0x594d4800
602 #define AC97_CODEC_YMF753 0x594d4803
605 * Functions for drivers to interact with the common ac97 module.
607 typedef struct ac97 ac97_t;
608 typedef void (*ac97_wr_t)(void *, uint8_t, uint16_t);
609 typedef uint16_t (*ac97_rd_t)(void *, uint8_t);
610 typedef struct ac97_ctrl ac97_ctrl_t;
611 typedef boolean_t (*ac97_ctrl_walk_t)(ac97_ctrl_t *, void *);
614 * Old style initialization. The driver simply calls ac97_alloc()
615 * followed by ac97_init(). These interfaces should not be used in
616 * new drivers.
618 ac97_t *ac97_alloc(dev_info_t *, ac97_rd_t, ac97_wr_t, void *);
619 int ac97_init(ac97_t *, audio_dev_t *);
622 * New style initialization. The driver will call ac97_allocate(),
623 * then it can call ac97_register_controls() to register controls.
624 * Or, if it doesn't want all controls registered, it can find
625 * controls with ac97_find_control(), and register them individually
626 * with ac97_register_control(). ac97_alloc()
628 * Note that adjusting the set of controls should only be performed
629 * while the driver is single threaded, during attach or detach
630 * processing. The AC'97 framework does not provide any locks
631 * surrounding its internal list of controls. Note however that
632 * changes to the controls made from within the framework (e.g. by
633 * someone accessing the control via the audio framework) are safe.
635 ac97_t *ac97_allocate(audio_dev_t *, dev_info_t *, ac97_rd_t, ac97_wr_t,
636 void *);
637 void ac97_probe_controls(ac97_t *);
638 void ac97_register_controls(ac97_t *);
639 void ac97_unregister_controls(ac97_t *);
641 void ac97_walk_controls(ac97_t *, ac97_ctrl_walk_t, void *);
642 ac97_ctrl_t *ac97_control_find(ac97_t *, const char *);
643 void ac97_control_register(ac97_ctrl_t *);
644 void ac97_control_unregister(ac97_ctrl_t *);
645 void ac97_control_remove(ac97_ctrl_t *);
646 const char *ac97_control_name(ac97_ctrl_t *);
647 const audio_ctrl_desc_t *ac97_control_desc(ac97_ctrl_t *);
648 int ac97_control_get(ac97_ctrl_t *, uint64_t *);
649 int ac97_control_set(ac97_ctrl_t *, uint64_t);
652 * Bits common to both new style and old style initialization.
654 void ac97_free(ac97_t *);
655 void ac97_reset(ac97_t *);
656 int ac97_num_channels(ac97_t *);
658 #endif /* _KERNEL */
660 #ifdef __cplusplus
662 #endif
664 #endif /* _SYS_AC97_H */