| commit | b56bd489812c685819bdec6d83f7990f21473be8 | |
| author | Max Filippov <jcmvbkbc@gmail.com> | |
| Fri, 10 May 2019 14:48:14 +0000 (10 07:48 -0700) | ||
| committer | Waldemar Brodkorb <wbx@openadk.org> | |
| Mon, 13 May 2019 07:11:01 +0000 (13 09:11 +0200) | ||
| tree | e6baa632fd87a5a6ab464e64e3b53a4b13673d5c | treesnapshot (tar.gz zip) |
| parent | 30b85d43a7657eeac02462e8d84946358a5aa647 | commitdiff |
xtensa: don't use l32r opcode explicitly
xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| libc/string/xtensa/strcmp.S | diffblobblamehistory |