4 * Copyright (c) 2005-2007 Analog Devices Inc.
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
29 #if defined(CONFIG_MISC_INIT_R)
33 DECLARE_GLOBAL_DATA_PTR
;
37 printf("Board: ADI BF533 EZ-Kit Lite board\n");
38 printf(" Support: http://blackfin.uclinux.org/\n");
42 long int initdram(int board_type
)
46 char *tmp
= getenv("baudrate");
47 brate
= simple_strtoul(tmp
, NULL
, 16);
48 printf("Serial Port initialized with Baud rate = %x\n", brate
);
49 printf("SDRAM attributes:\n");
50 printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
51 "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
53 printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE
);
54 printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE
>> 20);
56 gd
->bd
->bi_memstart
= CFG_SDRAM_BASE
;
57 gd
->bd
->bi_memsize
= CFG_MAX_RAM_SIZE
;
58 return CFG_MAX_RAM_SIZE
;
61 #if defined(CONFIG_MISC_INIT_R)
62 /* miscellaneous platform dependent initialisations */
65 /* Set direction bits for Video en/decoder reset as output */
66 *(volatile unsigned char *)(CFG_FLASH1_BASE
+ PSD_PORTA_DIR
) =
67 PSDA_VDEC_RST
| PSDA_VENC_RST
;
68 /* Deactivate Video en/decoder reset lines */
69 *(volatile unsigned char *)(CFG_FLASH1_BASE
+ PSD_PORTA_DOUT
) =
70 PSDA_VDEC_RST
| PSDA_VENC_RST
;