From a02449a798349611629b2b969ad3880d0c61b96b Mon Sep 17 00:00:00 2001
From: Jeff Connelly <shellreef+git@gmail.com>
Date: Mon, 26 May 2008 00:53:50 -0700
Subject: [PATCH] Add updated netlist for main trinary computer architecture.

---
 bb/main.map | 849 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 bb/main.net |  55 ++--
 2 files changed, 879 insertions(+), 25 deletions(-)
 create mode 100644 bb/main.map

diff --git a/bb/main.map b/bb/main.map
new file mode 100644
index 0000000..009dd1f
--- /dev/null
+++ b/bb/main.map
@@ -0,0 +1,849 @@
+EXECUTE,EXECUTE
+XXalu$XXnegB1$NTI_Out,XXalu$XXnegB1$NTI_Out
+XBUF_A2$_IN,XBUF_A2$_IN
+XXalu$XXfa0$XXdecodeY$XX1sti$PTI_Out,XXalu$XXfa0$XXdecodeY$XX1sti$PTI_Out
+XXalu$XXfa0$XXdecodeY$XXinti$PTI_Out,XXalu$XXfa0$XXdecodeY$XXinti$PTI_Out
+CLK_STATUS,CLK_STATUS
+XX1$XX1$XXmux1$XXdecoder$XXinti$STI_Out,XX1$XX1$XXmux1$XXdecoder$XXinti$STI_Out
+XXalu$XXfa0$XXdecodeX$XXinti$STI_Out,XXalu$XXfa0$XXdecodeX$XXinti$STI_Out
+XX1$XX1$XXmux1$XXdecoder$XX1pti$NTI_Out,XX1$XX1$XXmux1$XXdecoder$XX1pti$NTI_Out
+XCYCLE_PC$XXpti$NTI_Out,XCYCLE_PC$XXpti$NTI_Out
+XX3$XX1pti$NTI_Out,XX3$XX1pti$NTI_Out
+XXalu$XXfa2$XXdecodeX$XX0nor$NP,XXalu$XXfa2$XXdecodeX$XX0nor$NP
+XMUX_ALU_B$XXmux3$XXdecoder$XX0nor$NP,XMUX_ALU_B$XXmux3$XXdecoder$XX0nor$NP
+0,0
+XXalu$XXfa2$XXdecodeX$XX1pti$STI_Out,XXalu$XXfa2$XXdecodeX$XX1pti$STI_Out
+XMUX_ALU_B$XXmux3$XXdecoder$XX0nor$NN,XMUX_ALU_B$XXmux3$XXdecoder$XX0nor$NN
+XMUX_ALU_B$XXmux3$XXdecoder$XX0nor$NI,XMUX_ALU_B$XXmux3$XXdecoder$XX0nor$NI
+IC_MDP1403-12K_168,IC_MDP1403-12K_168
+XXalu$XXfa2$XXdecodeX$XX0nor$NN,XXalu$XXfa2$XXdecodeX$XX0nor$NN
+IC_MDP1403-12K_164,IC_MDP1403-12K_164
+XXalu$XXfa2$XXdecodeX$XX0nor$NI,XXalu$XXfa2$XXdecodeX$XX0nor$NI
+XREGISTER_A$NC_03,XREGISTER_A$NC_03
+IC_CD4007_79,IC_CD4007_79
+XREGISTER_A$XXtrit0$XSlave$XXgatetop$NI,XREGISTER_A$XXtrit0$XSlave$XXgatetop$NI
+XXalu$XXnegB0$NTI_Out,XXalu$XXnegB0$NTI_Out
+XREGISTER_A$XXtrit0$XSlave$XXgatetop$NN,XREGISTER_A$XXtrit0$XSlave$XXgatetop$NN
+IC_CD4007_71,IC_CD4007_71
+IC_MDP1403-12K_64,IC_MDP1403-12K_64
+IC_MDP1403-12K_67,IC_MDP1403-12K_67
+XXalu$XXfa2$XXdecodeY$XXinti$STI_Out,XXalu$XXfa2$XXdecodeY$XXinti$STI_Out
+IC_MDP1403-12K_61,IC_MDP1403-12K_61
+IC_CD4007_74,IC_CD4007_74
+IC_CD4007_76,IC_CD4007_76
+IC_MDP1403-12K_181,IC_MDP1403-12K_181
+XXalu$XXfa2$XX1$XX0nor$NI,XXalu$XXfa2$XX1$XX0nor$NI
+XREGISTER_A$XXtrit0$XSlave$_Q_storage,XREGISTER_A$XXtrit0$XSlave$_Q_storage
+IC_MDP1403-12K_184,IC_MDP1403-12K_184
+XREGISTER_A$XXtrit0$XSlave$XXgatetop$NP,XREGISTER_A$XXtrit0$XSlave$XXgatetop$NP
+IC_MDP1403-12K_188,IC_MDP1403-12K_188
+XBUF_A1$XXinv1$NTI_Out,XBUF_A1$XXinv1$NTI_Out
+XXalu$XXfa2$XXdecodeX$XXinti$STI_Out,XXalu$XXfa2$XXdecodeX$XXinti$STI_Out
+XCYCLE_PC$XXtnor0$NI,XCYCLE_PC$XXtnor0$NI
+IC_CD4016_132,IC_CD4016_132
+IC_MDP1403-12K_118,IC_MDP1403-12K_118
+Vss,$G_Vss
+IC_CD4016_137,IC_CD4016_137
+IC_CD4016_136,IC_CD4016_136
+IC_CD4016_135,IC_CD4016_135
+XCYCLE_PC$XXtnor0$NN,XCYCLE_PC$XXtnor0$NN
+IC_MDP1403-12K_98,IC_MDP1403-12K_98
+IC_CD4016_139,IC_CD4016_139
+IC_CD4016_138,IC_CD4016_138
+XXalu$S1,XXalu$S1
+XXalu$S0,XXalu$S0
+XXalu$S2,XXalu$S2
+IC_CD4007_185,IC_CD4007_185
+XCYCLE_PC$XXtnor0$NP,XCYCLE_PC$XXtnor0$NP
+XREGISTER_A$XXtrit1$XSlave$XXgatetop$NN,XREGISTER_A$XXtrit1$XSlave$XXgatetop$NN
+XREGISTER_A$XXtrit1$XSlave$XXgatetop$NI,XREGISTER_A$XXtrit1$XSlave$XXgatetop$NI
+XSTATUS_REG$XMaster$XXgatetop$NN,XSTATUS_REG$XMaster$XXgatetop$NN
+XSTATUS_REG$XMaster$XXgatetop$NI,XSTATUS_REG$XMaster$XXgatetop$NI
+XBUF_A0$XXinv2$NTI_Out,XBUF_A0$XXinv2$NTI_Out
+XSTATUS_REG$XMaster$XXgatetop$NP,XSTATUS_REG$XMaster$XXgatetop$NP
+XREGISTER_A$XXtrit1$_CLK,XREGISTER_A$XXtrit1$_CLK
+XXalu$XXfa2$XX1$XXinti$STI_Out,XXalu$XXfa2$XX1$XXinti$STI_Out
+XX3$XX1sti$NTI_Out,XX3$XX1sti$NTI_Out
+IC_CD4007_183,IC_CD4007_183
+XREGISTER_A$XXtrit1$XSlave$XXgatetop$NP,XREGISTER_A$XXtrit1$XSlave$XXgatetop$NP
+XXalu$XXfa0$XX1$IN_pti,XXalu$XXfa0$XX1$IN_pti
+XSTATUS_REG$XSlave$X_Xlatch$NI,XSTATUS_REG$XSlave$X_Xlatch$NI
+NX80,XXalu$XX1$XXcheckI3$XXdecoder$XXinti$STI_Out
+XXalu$XXfa2$XX1$XX1pti$STI_Out,XXalu$XXfa2$XX1$XX1pti$STI_Out
+XSTATUS_REG$XSlave$X_Xlatch$NN,XSTATUS_REG$XSlave$X_Xlatch$NN
+XSTATUS_REG$XSlave$X_Xlatch$NP,XSTATUS_REG$XSlave$X_Xlatch$NP
+XXalu$XXfa2$CTRL_C0C,XXalu$XXfa2$CTRL_C0C
+IC_CD4007_119,IC_CD4007_119
+XMUX_ALU_A$XXmux1$CTRL_A,XMUX_ALU_A$XXmux1$CTRL_A
+XMUX_ALU_A$XXmux1$CTRL_B,XMUX_ALU_A$XXmux1$CTRL_B
+XMUX_ALU_A$XXmux1$CTRL_C,XMUX_ALU_A$XXmux1$CTRL_C
+XPROGRAM_COUNTER$XSlave$XXlatch$NP,XPROGRAM_COUNTER$XSlave$XXlatch$NP
+IC_CD4007_117,IC_CD4007_117
+XREGISTER_A$XXtrit1$XSlave$XXgatebot$NP,XREGISTER_A$XXtrit1$XSlave$XXgatebot$NP
+XREGISTER_A$XXtrit1$XSlave$XXgatebot$NN,XREGISTER_A$XXtrit1$XSlave$XXgatebot$NN
+XXalu$XXfa2$CTRL_CA,XXalu$XXfa2$CTRL_CA
+XX1$XX1$XXmux1$CTRL_B,XX1$XX1$XXmux1$CTRL_B
+XX1$XX1$XXmux1$CTRL_C,XX1$XX1$XXmux1$CTRL_C
+XREGISTER_A$XXtrit1$XSlave$XXgatebot$NI,XREGISTER_A$XXtrit1$XSlave$XXgatebot$NI
+XX1$XX1$XXmux1$CTRL_A,XX1$XX1$XXmux1$CTRL_A
+XXalu$XXfa1$XXdecodeX$XX1sti$PTI_Out,XXalu$XXfa1$XXdecodeX$XX1sti$PTI_Out
+XXalu$XXfa0$XX1$XX1sti$PTI_Out,XXalu$XXfa0$XX1$XX1sti$PTI_Out
+XMUX_ALU_B$XXmux3$CTRL_A,XMUX_ALU_B$XXmux3$CTRL_A
+XMUX_ALU_B$XXmux3$CTRL_C,XMUX_ALU_B$XXmux3$CTRL_C
+XMUX_ALU_A$XXmux1$XXdecoder$XX0nor$NI,XMUX_ALU_A$XXmux1$XXdecoder$XX0nor$NI
+XMUX_ALU_A$XXmux1$XXdecoder$XX0nor$NN,XMUX_ALU_A$XXmux1$XXdecoder$XX0nor$NN
+XPROGRAM_COUNTER$XMaster$XXgatebot$NP,XPROGRAM_COUNTER$XMaster$XXgatebot$NP
+XREGISTER_A$XXtrit1$XSlave$_D,XREGISTER_A$XXtrit1$XSlave$_D
+XX1$XX1$XXmux2$XXdecoder$XX1pti$NTI_Out,XX1$XX1$XXmux2$XXdecoder$XX1pti$NTI_Out
+XMUX_ALU_A$XXmux1$XXdecoder$XX0nor$NP,XMUX_ALU_A$XXmux1$XXdecoder$XX0nor$NP
+XREGISTER_A$XXtrit0$XXstiCLK$NTI_Out,XREGISTER_A$XXtrit0$XXstiCLK$NTI_Out
+IC_MDP1403-12K_158,IC_MDP1403-12K_158
+IC_CD4007_208,IC_CD4007_208
+IC_CD4007_207,IC_CD4007_207
+XREGISTER_A$XXtrit1$between,XREGISTER_A$XXtrit1$between
+IC_CD4007_204,IC_CD4007_204
+IC_CD4007_201,IC_CD4007_201
+XXalu$XXfa1$CTRL_SB,XXalu$XXfa1$CTRL_SB
+XXalu$XXfa1$A5,XXalu$XXfa1$A5
+XXalu$XXfa1$A4,XXalu$XXfa1$A4
+XXalu$XXfa1$A6,XXalu$XXfa1$A6
+XXalu$XXfa1$A1,XXalu$XXfa1$A1
+XXalu$XXfa0$CTRL_C0C,XXalu$XXfa0$CTRL_C0C
+XXalu$XXfa1$A2,XXalu$XXfa1$A2
+XBUF_A1$XXinv2$PTI_Out,XBUF_A1$XXinv2$PTI_Out
+XSTATUS_REG$XMaster$XXstiD$PTI_Out,XSTATUS_REG$XMaster$XXstiD$PTI_Out
+XREGISTER_A$XXtrit1$XSlave$XXlatch$NP,XREGISTER_A$XXtrit1$XSlave$XXlatch$NP
+XREGISTER_A$XXtrit1$XSlave$XXlatch$NN,XREGISTER_A$XXtrit1$XSlave$XXlatch$NN
+XMUX_ALU_A$XXmux2$XXdecoder$IN_pti,XMUX_ALU_A$XXmux2$XXdecoder$IN_pti
+NX58,XMUX_ALU_B$XXmux2$XXdecoder$XXinti$PTI_Out
+XREGISTER_A$XXtrit1$XSlave$XXlatch$NI,XREGISTER_A$XXtrit1$XSlave$XXlatch$NI
+NX55,XMUX_ALU_B$XXmux2$XXdecoder$XX1pti$NTI_Out
+NX54,XMUX_ALU_B$XXmux1$XXdecoder$XX1pti$STI_Out
+NX57,XMUX_ALU_B$XXmux2$XXdecoder$XX1sti$NTI_Out
+NX56,XMUX_ALU_B$XXmux2$XXdecoder$XX1sti$PTI_Out
+NX51,XMUX_ALU_B$XXmux1$XXdecoder$XX1sti$NTI_Out
+NX50,XMUX_ALU_B$XXmux1$XXdecoder$XX1sti$PTI_Out
+NX53,XMUX_ALU_B$XXmux1$XXdecoder$XXinti$STI_Out
+NX52,XMUX_ALU_B$XXmux1$XXdecoder$XXinti$PTI_Out
+XXalu$XXfa1$XX1$IN_pti,XXalu$XXfa1$XX1$IN_pti
+XJUMP_MUX$XXdecoder$XX0nor$NP,XJUMP_MUX$XXdecoder$XX0nor$NP
+XBUF_A2$XXinv2$PTI_Out,XBUF_A2$XXinv2$PTI_Out
+XREGISTER_A$XXtrit0$XSlave$Q_storage,XREGISTER_A$XXtrit0$XSlave$Q_storage
+XX1$XX1$XXmux2$XXdecoder$XX0nor$NP,XX1$XX1$XXmux2$XXdecoder$XX0nor$NP
+XXalu$XXfa2$A1,XXalu$XXfa2$A1
+XXalu$XXfa2$A2,XXalu$XXfa2$A2
+XXalu$XXfa2$A3,XXalu$XXfa2$A3
+XXalu$XXfa2$A4,XXalu$XXfa2$A4
+XXalu$XXfa2$A5,XXalu$XXfa2$A5
+XXalu$XXfa2$A6,XXalu$XXfa2$A6
+XPROGRAM_COUNTER$XSlave$XXgatetop$NN,XPROGRAM_COUNTER$XSlave$XXgatetop$NN
+XXalu$XXfa2$XXdecodeY$IN_pti,XXalu$XXfa2$XXdecodeY$IN_pti
+XBUF_A1$XXinv1$PTI_Out,XBUF_A1$XXinv1$PTI_Out
+XPROGRAM_COUNTER$XSlave$XXgatetop$NI,XPROGRAM_COUNTER$XSlave$XXgatetop$NI
+XPROGRAM_COUNTER$_CLK,XPROGRAM_COUNTER$_CLK
+Xcg$Xinvert_clk$PTI_Out,Xcg$Xinvert_clk$PTI_Out
+XPROGRAM_COUNTER$XSlave$XXgatetop$NP,XPROGRAM_COUNTER$XSlave$XXgatetop$NP
+XXalu$XX1$XXcheckI2$CTRL_A,XXalu$XX1$XXcheckI2$CTRL_A
+XXalu$XX1$XXcheckI2$CTRL_B,XXalu$XX1$XXcheckI2$CTRL_B
+XXalu$XX1$XXcheckI2$CTRL_C,XXalu$XX1$XXcheckI2$CTRL_C
+XXalu$XXfa1$XXdecodeX$XXinti$STI_Out,XXalu$XXfa1$XXdecodeX$XXinti$STI_Out
+XCYCLE_PC$_IN_NTI,XCYCLE_PC$_IN_NTI
+XREGISTER_A$XXtrit0$_CLK,XREGISTER_A$XXtrit0$_CLK
+XSTATUS_REG$XXstiCLK$NTI_Out,XSTATUS_REG$XXstiCLK$NTI_Out
+NX39,XMUX_ALU_A$XXmux2$XXdecoder$XX1sti$NTI_Out
+IC_CD4007_200,IC_CD4007_200
+IC_MDP1403-12K_154,IC_MDP1403-12K_154
+XMUX_PC$XXdecoder$IN_pti,XMUX_PC$XXdecoder$IN_pti
+IC_MDP1403-12K_161,IC_MDP1403-12K_161
+IC_MDP1403-12K_150,IC_MDP1403-12K_150
+XMUX_ALU_B$XXmux1$XXdecoder$IN_pti,XMUX_ALU_B$XXmux1$XXdecoder$IN_pti
+IC_MDP1403-12K_33,IC_MDP1403-12K_33
+IC_MDP1403-12K_37,IC_MDP1403-12K_37
+IC_CD4007_78,IC_CD4007_78
+XREGISTER_A$XXtrit2$XMaster$_Q_storage,XREGISTER_A$XXtrit2$XMaster$_Q_storage
+XBUF_A0$XXinv1$PTI_Out,XBUF_A0$XXinv1$PTI_Out
+IC_CD4007_40,IC_CD4007_40
+XXalu$XXfa0$XXdecodeX$IN_pti,XXalu$XXfa0$XXdecodeX$IN_pti
+IC_CD4007_42,IC_CD4007_42
+IC_CD4007_43,IC_CD4007_43
+IC_CD4007_44,IC_CD4007_44
+IC_CD4007_46,IC_CD4007_46
+IC_CD4007_47,IC_CD4007_47
+IC_CD4007_48,IC_CD4007_48
+NX59,XMUX_ALU_B$XXmux2$XXdecoder$XXinti$STI_Out
+XXalu$XXfa0$A6,XXalu$XXfa0$A6
+XXalu$XXfa1$CTRL_SA,XXalu$XXfa1$CTRL_SA
+XXalu$XXfa0$A4,XXalu$XXfa0$A4
+XXalu$XXfa0$A5,XXalu$XXfa0$A5
+XXalu$XXfa0$A2,XXalu$XXfa0$A2
+XXalu$XXfa0$A3,XXalu$XXfa0$A3
+NX36,XMUX_ALU_A$XXmux2$XXdecoder$XX1pti$STI_Out
+XMUX_ALU_B$XXmux3$XXdecoder$IN_pti,XMUX_ALU_B$XXmux3$XXdecoder$IN_pti
+XXalu$XXfa1$XXdecodeX$XX1pti$STI_Out,XXalu$XXfa1$XXdecodeX$XX1pti$STI_Out
+NX35,XMUX_ALU_A$XXmux1$XXdecoder$XX1sti$PTI_Out
+IC_CD4007_70,IC_CD4007_70
+XMUX_PC$XXdecoder$XX1pti$NTI_Out,XMUX_PC$XXdecoder$XX1pti$NTI_Out
+XX1$XX1$XXmux2$XXdecoder$XXinti$PTI_Out,XX1$XX1$XXmux2$XXdecoder$XXinti$PTI_Out
+XXalu$XXfa2$XX1$XX0nor$NP,XXalu$XXfa2$XX1$XX0nor$NP
+XMUX_ALU_B$XXmux1$CTRL_C,XMUX_ALU_B$XXmux1$CTRL_C
+XMUX_ALU_B$XXmux1$CTRL_B,XMUX_ALU_B$XXmux1$CTRL_B
+XMUX_ALU_B$XXmux1$CTRL_A,XMUX_ALU_B$XXmux1$CTRL_A
+XXalu$XXfa1$XXdecodeX$XX0nor$NN,XXalu$XXfa1$XXdecodeX$XX0nor$NN
+XXalu$XXfa1$XXdecodeX$XX0nor$NI,XXalu$XXfa1$XXdecodeX$XX0nor$NI
+XX1$XX1$XXmux1$XXdecoder$XX0nor$NI,XX1$XX1$XXmux1$XXdecoder$XX0nor$NI
+IC_MDP1403-12K_202,IC_MDP1403-12K_202
+XXalu$XXfa1$XXdecodeX$XX0nor$NP,XXalu$XXfa1$XXdecodeX$XX0nor$NP
+XPROGRAM_COUNTER$XSlave$XXstiD$PTI_Out,XPROGRAM_COUNTER$XSlave$XXstiD$PTI_Out
+IC_MDP1403-12K_209,IC_MDP1403-12K_209
+XXalu$XX1$XXcheckI1$XXdecoder$IN_pti,XXalu$XX1$XXcheckI1$XXdecoder$IN_pti
+XPROGRAM_COUNTER$XMaster$X_Xlatch$NI,XPROGRAM_COUNTER$XMaster$X_Xlatch$NI
+XMUX_ALU_A$XXmux3$XXdecoder$IN_pti,XMUX_ALU_A$XXmux3$XXdecoder$IN_pti
+IC_CD4016_95,IC_CD4016_95
+IC_CD4016_199,IC_CD4016_199
+XXalu$XXfa2$CTRL_CB,XXalu$XXfa2$CTRL_CB
+XXalu$XXfa0$CTRL_C0B,XXalu$XXfa0$CTRL_C0B
+XREGISTER_A$XXtrit1$XSlave$Q_storage,XREGISTER_A$XXtrit1$XSlave$Q_storage
+XXalu$XXfa0$CTRL_C0A,XXalu$XXfa0$CTRL_C0A
+XREGISTER_A$XXtrit2$XSlave$_D,XREGISTER_A$XXtrit2$XSlave$_D
+IC_CD4016_193,IC_CD4016_193
+NX11,XREGISTER_A$XXtrit1$XMaster$XXgatetop$NP
+NX10,XREGISTER_A$XXtrit0$XSlave$XXstiD$NTI_Out
+NX13,XREGISTER_A$XXtrit1$XMaster$XXgatebot$NP
+NX12,XREGISTER_A$XXtrit1$XMaster$XXgatetop$NN
+NX15,XREGISTER_A$XXtrit1$XMaster$XXgatetop$NI
+NX14,XREGISTER_A$XXtrit1$XMaster$XXgatebot$NN
+NX17,XREGISTER_A$XXtrit1$XSlave$XXstiD$PTI_Out
+NX16,XREGISTER_A$XXtrit1$XMaster$XXgatebot$NI
+NX19,XREGISTER_A$XXtrit1$XMaster$XXstiD$NTI_Out
+NX18,XREGISTER_A$XXtrit1$XSlave$XXstiD$NTI_Out
+I0_opcode,I0_opcode
+XSTATUS_REG$XSlave$XXlatch$NN,XSTATUS_REG$XSlave$XXlatch$NN
+XXalu$_B0,XXalu$_B0
+XXalu$_B1,XXalu$_B1
+XXalu$_B2,XXalu$_B2
+XXalu$XXfa0$XXdecodeY$IN_pti,XXalu$XXfa0$XXdecodeY$IN_pti
+XXalu$XXfa0$A1,XXalu$XXfa0$A1
+XMUX_ALU_B$XXmux2$XXdecoder$IN_pti,XMUX_ALU_B$XXmux2$XXdecoder$IN_pti
+XPROGRAM_COUNTER$XSlave$_D,XPROGRAM_COUNTER$XSlave$_D
+XX1$XX1$XXmux2$XXdecoder$IN_pti,XX1$XX1$XXmux2$XXdecoder$IN_pti
+XSTATUS_REG$XMaster$_D,XSTATUS_REG$XMaster$_D
+XREGISTER_A$XXtrit2$_CLK,XREGISTER_A$XXtrit2$_CLK
+XXalu$XX1$XXcheckI3$CTRL_C,XXalu$XX1$XXcheckI3$CTRL_C
+XXalu$XX1$XXcheckI3$CTRL_B,XXalu$XX1$XXcheckI3$CTRL_B
+XXalu$XX1$XXcheckI3$CTRL_A,XXalu$XX1$XXcheckI3$CTRL_A
+IC_CD4007_157,IC_CD4007_157
+IC_CD4007_156,IC_CD4007_156
+IC_CD4007_155,IC_CD4007_155
+IC_CD4007_153,IC_CD4007_153
+ALU_IN_A2,ALU_IN_A2
+ALU_IN_A1,ALU_IN_A1
+ALU_IN_A0,ALU_IN_A0
+IC_CD4016_133,IC_CD4016_133
+XSTATUS_REG$XSlave$XXgatebot$NI,XSTATUS_REG$XSlave$XXgatebot$NI
+XREGISTER_A$XXtrit2$XXstiCLK$PTI_Out,XREGISTER_A$XXtrit2$XXstiCLK$PTI_Out
+XSTATUS_REG$XSlave$XXgatebot$NN,XSTATUS_REG$XSlave$XXgatebot$NN
+XREGISTER_A$XXtrit2$XSlave$X_Xlatch$NI,XREGISTER_A$XXtrit2$XSlave$X_Xlatch$NI
+IC_CD4016_131,IC_CD4016_131
+XREGISTER_A$XXtrit2$XSlave$X_Xlatch$NN,XREGISTER_A$XXtrit2$XSlave$X_Xlatch$NN
+XREGISTER_A$XXtrit2$XSlave$X_Xlatch$NP,XREGISTER_A$XXtrit2$XSlave$X_Xlatch$NP
+NX65,XMUX_ALU_B$XXmux3$XXdecoder$XXinti$PTI_Out
+NX66,XMUX_ALU_B$XXmux3$XXdecoder$XXinti$STI_Out
+NX67,XXalu$XX1$XXcheckI2$XXdecoder$XX1pti$NTI_Out
+NX60,XMUX_ALU_B$XXmux2$XXdecoder$XX1pti$STI_Out
+NX61,XMUX_ALU_B$XXmux3$XXdecoder$XX1pti$NTI_Out
+NX62,XMUX_ALU_B$XXmux3$XXdecoder$XX1sti$PTI_Out
+NX63,XMUX_ALU_B$XXmux3$XXdecoder$XX1sti$NTI_Out
+XSTATUS_REG$XSlave$XXgatebot$NP,XSTATUS_REG$XSlave$XXgatebot$NP
+NX68,XXalu$XX1$XXcheckI2$XXdecoder$XX1sti$PTI_Out
+NX69,XXalu$XX1$XXcheckI2$XXdecoder$XX1sti$NTI_Out
+XX3$XXinti$PTI_Out,XX3$XXinti$PTI_Out
+XXalu$XXfa1$CTRL_CA,XXalu$XXfa1$CTRL_CA
+XX1$XX1$XXmux2$XXdecoder$XX1sti$NTI_Out,XX1$XX1$XXmux2$XXdecoder$XX1sti$NTI_Out
+IC_CD4016_134,IC_CD4016_134
+XXalu$XXfa2$XXdecodeY$XX0nor$NP,XXalu$XXfa2$XXdecodeY$XX0nor$NP
+XBUF_A2$XXinv1$PTI_Out,XBUF_A2$XXinv1$PTI_Out
+XXalu$XXfa1$XXdecodeX$XX1pti$NTI_Out,XXalu$XXfa1$XXdecodeX$XX1pti$NTI_Out
+XXalu$XXfa2$XXdecodeX$XX1pti$NTI_Out,XXalu$XXfa2$XXdecodeX$XX1pti$NTI_Out
+XXalu$XXfa1$CTRL_XA,XXalu$XXfa1$CTRL_XA
+XXalu$XXfa1$CTRL_XC,XXalu$XXfa1$CTRL_XC
+XXalu$XXfa1$CTRL_XB,XXalu$XXfa1$CTRL_XB
+XXalu$XX1$XXcheckI3$XXdecoder$XX0nor$NI,XXalu$XX1$XXcheckI3$XXdecoder$XX0nor$NI
+IC_CD4007_84,IC_CD4007_84
+IC_CD4007_85,IC_CD4007_85
+IC_CD4007_86,IC_CD4007_86
+XREGISTER_A$XXtrit2$XMaster$XXlatch$NI,XREGISTER_A$XXtrit2$XMaster$XXlatch$NI
+XREGISTER_A$XXtrit2$XMaster$XXlatch$NN,XREGISTER_A$XXtrit2$XMaster$XXlatch$NN
+IC_CD4007_81,IC_CD4007_81
+IC_CD4007_82,IC_CD4007_82
+XX1$XX1$XXmux3$XXdecoder$XXinti$PTI_Out,XX1$XX1$XXmux3$XXdecoder$XXinti$PTI_Out
+IC_MDP1403-12K_75,IC_MDP1403-12K_75
+IC_MDP1403-12K_72,IC_MDP1403-12K_72
+XX3$IN_pti,XX3$IN_pti
+XXalu$XX1$XXcheckI2$XXdecoder$IN_pti,XXalu$XX1$XXcheckI2$XXdecoder$IN_pti
+XREGISTER_A$XXtrit1$XMaster$_Q_storage,XREGISTER_A$XXtrit1$XMaster$_Q_storage
+XREGISTER_A$XXtrit2$XMaster$XXlatch$NP,XREGISTER_A$XXtrit2$XMaster$XXlatch$NP
+XREGISTER_A$XXtrit2$XSlave$Q_storage,XREGISTER_A$XXtrit2$XSlave$Q_storage
+XDO_CMP$AtnandB,XDO_CMP$AtnandB
+IC_CD4016_122,IC_CD4016_122
+XBUF_A0$XXinv1$NTI_Out,XBUF_A0$XXinv1$NTI_Out
+IC_MDP1403-12K_103,IC_MDP1403-12K_103
+XX3$XX0nor$NP,XX3$XX0nor$NP
+IC_MDP1403-12K_106,IC_MDP1403-12K_106
+XX3$XX0nor$NI,XX3$XX0nor$NI
+XREGISTER_A$NC_02,XREGISTER_A$NC_02
+XX3$XX0nor$NN,XX3$XX0nor$NN
+XREGISTER_A$NC_01,XREGISTER_A$NC_01
+XPROGRAM_COUNTER$between,XPROGRAM_COUNTER$between
+XSTATUS_REG$_CLK,XSTATUS_REG$_CLK
+IS_CMP,IS_CMP
+XXalu$XXfa2$XXdecodeY$XX1sti$PTI_Out,XXalu$XXfa2$XXdecodeY$XX1sti$PTI_Out
+XXalu$XX1$N002,XXalu$XX1$N002
+XXalu$XX1$N001,XXalu$XX1$N001
+IC_CD4007_19,IC_CD4007_19
+IC_CD4007_18,IC_CD4007_18
+IC_CD4007_16,IC_CD4007_16
+IC_CD4007_15,IC_CD4007_15
+IC_CD4007_14,IC_CD4007_14
+IC_CD4007_13,IC_CD4007_13
+IC_CD4007_11,IC_CD4007_11
+IC_CD4007_10,IC_CD4007_10
+XPROGRAM_COUNTER$XSlave$XXgatebot$NP,XPROGRAM_COUNTER$XSlave$XXgatebot$NP
+IC_CD4007_8,IC_CD4007_8
+IC_CD4007_3,IC_CD4007_3
+IC_CD4007_1,IC_CD4007_1
+XJUMP_MUX$XXdecoder$XX1sti$PTI_Out,XJUMP_MUX$XXdecoder$XX1sti$PTI_Out
+IC_CD4007_6,IC_CD4007_6
+IC_CD4007_4,IC_CD4007_4
+XPROGRAM_COUNTER$XXstiCLK$NTI_Out,XPROGRAM_COUNTER$XXstiCLK$NTI_Out
+XSTATUS_REG$XSlave$_Q_storage,XSTATUS_REG$XSlave$_Q_storage
+XPROGRAM_COUNTER$XMaster$_Q_storage,XPROGRAM_COUNTER$XMaster$_Q_storage
+S_IN,S_IN
+XSTATUS_REG$XSlave$XXlatch$NI,XSTATUS_REG$XSlave$XXlatch$NI
+IC_CD4007_104,IC_CD4007_104
+IC_CD4007_105,IC_CD4007_105
+IC_CD4007_107,IC_CD4007_107
+IC_CD4007_101,IC_CD4007_101
+IC_CD4007_102,IC_CD4007_102
+XXalu$XXfa0$XX1$XXinti$PTI_Out,XXalu$XXfa0$XX1$XXinti$PTI_Out
+XXalu$XXfa2$XXdecodeY$XX0nor$NI,XXalu$XXfa2$XXdecodeY$XX0nor$NI
+XXalu$XXfa2$XXdecodeY$XX0nor$NN,XXalu$XXfa2$XXdecodeY$XX0nor$NN
+XJUMP_MUX$XXdecoder$XX1pti$STI_Out,XJUMP_MUX$XXdecoder$XX1pti$STI_Out
+XXalu$XXfa1$XX1$XXinti$STI_Out,XXalu$XXfa1$XX1$XXinti$STI_Out
+XPROGRAM_COUNTER$XXstiCLK$PTI_Out,XPROGRAM_COUNTER$XXstiCLK$PTI_Out
+XMUX_PC$XXdecoder$XXinti$STI_Out,XMUX_PC$XXdecoder$XXinti$STI_Out
+XX1$XX1$XXmux3$XXdecoder$XX1pti$STI_Out,XX1$XX1$XXmux3$XXdecoder$XX1pti$STI_Out
+XXalu$XXfa0$XXdecodeY$XX1sti$NTI_Out,XXalu$XXfa0$XXdecodeY$XX1sti$NTI_Out
+NX82,XXalu$XX1$XXcheckI1$XXdecoder$XX1sti$NTI_Out
+XXalu$XXfa1$XXdecodeY$IN_pti,XXalu$XXfa1$XXdecodeY$IN_pti
+XXalu$XXfa0$XXdecodeX$XX1pti$NTI_Out,XXalu$XXfa0$XXdecodeX$XX1pti$NTI_Out
+XX1$XX1$XXmux3$CTRL_A,XX1$XX1$XXmux3$CTRL_A
+XX1$XX1$XXmux3$CTRL_B,XX1$XX1$XXmux3$CTRL_B
+XX1$XX1$XXmux3$CTRL_C,XX1$XX1$XXmux3$CTRL_C
+IC_CD4007_192,IC_CD4007_192
+IC_CD4007_190,IC_CD4007_190
+IC_CD4007_197,IC_CD4007_197
+IC_CD4007_196,IC_CD4007_196
+IC_CD4007_194,IC_CD4007_194
+IC_CD4007_210,IC_CD4007_210
+NX83,XXalu$XX1$XXcheckI1$XXdecoder$XX1sti$PTI_Out
+XXalu$XXfa2$CTRL_C0A,XXalu$XXfa2$CTRL_C0A
+XXalu$XXfa0$XXdecodeY$XX1pti$NTI_Out,XXalu$XXfa0$XXdecodeY$XX1pti$NTI_Out
+XREGISTER_A$XXtrit1$XMaster$XXlatch$NP,XREGISTER_A$XXtrit1$XMaster$XXlatch$NP
+XREGISTER_A$XXtrit2$XSlave$_Q_storage,XREGISTER_A$XXtrit2$XSlave$_Q_storage
+NX28,XREGISTER_A$XXtrit2$XMaster$XXgatebot$NN
+NX29,XREGISTER_A$XXtrit2$XSlave$XXstiD$PTI_Out
+XSTATUS_REG$between,XSTATUS_REG$between
+XXalu$XXfa2$XXdecodeY$XX1sti$NTI_Out,XXalu$XXfa2$XXdecodeY$XX1sti$NTI_Out
+NX20,XREGISTER_A$XXtrit1$XMaster$XXstiD$PTI_Out
+NX21,XREGISTER_A$XXtrit2$XMaster$XXstiD$PTI_Out
+NX22,XREGISTER_A$XXtrit2$XMaster$XXstiD$NTI_Out
+NX23,XREGISTER_A$XXtrit2$XMaster$XXgatetop$NP
+NX24,XREGISTER_A$XXtrit2$XMaster$XXgatetop$NN
+NX25,XREGISTER_A$XXtrit2$XMaster$XXgatebot$NP
+NX26,XREGISTER_A$XXtrit2$XMaster$XXgatetop$NI
+NX27,XREGISTER_A$XXtrit2$XMaster$XXgatebot$NI
+XDO_LWI$AtnandB,XDO_LWI$AtnandB
+XXalu$XXfa2$XXdecodeX$XX1sti$PTI_Out,XXalu$XXfa2$XXdecodeX$XX1sti$PTI_Out
+XMUX_PC$XXdecoder$XX0nor$NP,XMUX_PC$XXdecoder$XX0nor$NP
+XSTATUS_REG$XMaster$XXgatebot$NP,XSTATUS_REG$XMaster$XXgatebot$NP
+A0_BUF,A0_BUF
+XMUX_PC$XXdecoder$XX0nor$NN,XMUX_PC$XXdecoder$XX0nor$NN
+XMUX_PC$XXdecoder$XX0nor$NI,XMUX_PC$XXdecoder$XX0nor$NI
+IC_CD4016_88,IC_CD4016_88
+IC_CD4016_89,IC_CD4016_89
+XSTATUS_REG$XSlave$Q_storage,XSTATUS_REG$XSlave$Q_storage
+XPROGRAM_COUNTER$XSlave$X_Xlatch$NP,XPROGRAM_COUNTER$XSlave$X_Xlatch$NP
+XX1$XX1$XXmux2$CTRL_B,XX1$XX1$XXmux2$CTRL_B
+XREGISTER_A$XXtrit2$XSlave$XXlatch$NN,XREGISTER_A$XXtrit2$XSlave$XXlatch$NN
+XREGISTER_A$XXtrit2$XSlave$XXlatch$NI,XREGISTER_A$XXtrit2$XSlave$XXlatch$NI
+XMUX_ALU_B$XXmux2$XXdecoder$XX0nor$NP,XMUX_ALU_B$XXmux2$XXdecoder$XX0nor$NP
+XXalu$XXfa2$CTRL_C0B,XXalu$XXfa2$CTRL_C0B
+XREGISTER_A$XXtrit0$XMaster$X_Xlatch$NI,XREGISTER_A$XXtrit0$XMaster$X_Xlatch$NI
+XXalu$XXfa2$XXdecodeX$XXinti$PTI_Out,XXalu$XXfa2$XXdecodeX$XXinti$PTI_Out
+XMUX_ALU_B$XXmux2$XXdecoder$XX0nor$NN,XMUX_ALU_B$XXmux2$XXdecoder$XX0nor$NN
+XJUMP_MUX$XXdecoder$IN_pti,XJUMP_MUX$XXdecoder$IN_pti
+XXalu$XXfa1$CTRL_C0A,XXalu$XXfa1$CTRL_C0A
+XMUX_PC$XXdecoder$XXinti$PTI_Out,XMUX_PC$XXdecoder$XXinti$PTI_Out
+XREGISTER_A$XXtrit2$XSlave$XXlatch$NP,XREGISTER_A$XXtrit2$XSlave$XXlatch$NP
+XPROGRAM_COUNTER$XSlave$X_Xlatch$NN,XPROGRAM_COUNTER$XSlave$X_Xlatch$NN
+XXalu$XXfa0$XXdecodeX$XX0nor$NI,XXalu$XXfa0$XXdecodeX$XX0nor$NI
+XPROGRAM_COUNTER$XMaster$Q_storage,XPROGRAM_COUNTER$XMaster$Q_storage
+XXalu$XXfa0$XXdecodeX$XX0nor$NN,XXalu$XXfa0$XXdecodeX$XX0nor$NN
+XREGISTER_A$XXtrit0$XMaster$XXlatch$NI,XREGISTER_A$XXtrit0$XMaster$XXlatch$NI
+XREGISTER_A$XXtrit0$XMaster$XXlatch$NN,XREGISTER_A$XXtrit0$XMaster$XXlatch$NN
+XSTATUS_REG$XMaster$XXlatch$NP,XSTATUS_REG$XMaster$XXlatch$NP
+XREGISTER_A$XXtrit0$XMaster$XXlatch$NP,XREGISTER_A$XXtrit0$XMaster$XXlatch$NP
+XSTATUS_REG$XMaster$XXlatch$NN,XSTATUS_REG$XMaster$XXlatch$NN
+XREGISTER_A$XXtrit0$between,XREGISTER_A$XXtrit0$between
+XX1$XX1$XXmux1$XXdecoder$XX0nor$NN,XX1$XX1$XXmux1$XXdecoder$XX0nor$NN
+XSTATUS_REG$XMaster$XXlatch$NI,XSTATUS_REG$XMaster$XXlatch$NI
+IC_MDP1403-12K_142,IC_MDP1403-12K_142
+XXalu$XXfa0$XXdecodeX$XX0nor$NP,XXalu$XXfa0$XXdecodeX$XX0nor$NP
+XPROGRAM_COUNTER$NC_01,XPROGRAM_COUNTER$NC_01
+XXalu$XXfa0$XX1$XX0nor$NN,XXalu$XXfa0$XX1$XX0nor$NN
+XREGISTER_A$XXtrit1$XSlave$X_Xlatch$NP,XREGISTER_A$XXtrit1$XSlave$X_Xlatch$NP
+XREGISTER_A$XXtrit2$XSlave$XXgatebot$NN,XREGISTER_A$XXtrit2$XSlave$XXgatebot$NN
+XREGISTER_A$XXtrit2$XSlave$XXgatebot$NI,XREGISTER_A$XXtrit2$XSlave$XXgatebot$NI
+IC_CD4007_53,IC_CD4007_53
+XREGISTER_A$XXtrit1$XXstiCLK$PTI_Out,XREGISTER_A$XXtrit1$XXstiCLK$PTI_Out
+IC_CD4007_51,IC_CD4007_51
+IC_CD4007_50,IC_CD4007_50
+XREGISTER_A$XXtrit2$XSlave$XXgatebot$NP,XREGISTER_A$XXtrit2$XSlave$XXgatebot$NP
+IC_CD4007_56,IC_CD4007_56
+XREGISTER_A$XXtrit0$XMaster$_Q_storage,XREGISTER_A$XXtrit0$XMaster$_Q_storage
+IC_CD4007_54,IC_CD4007_54
+XREGISTER_A$XXtrit2$XMaster$Q_storage,XREGISTER_A$XXtrit2$XMaster$Q_storage
+IC_CD4007_58,IC_CD4007_58
+XREGISTER_A$XXtrit1$XSlave$X_Xlatch$NI,XREGISTER_A$XXtrit1$XSlave$X_Xlatch$NI
+XXalu$XXfa1$XXdecodeY$XX1sti$NTI_Out,XXalu$XXfa1$XXdecodeY$XX1sti$NTI_Out
+XX1$XX1$XXmux3$XXdecoder$XX1sti$PTI_Out,XX1$XX1$XXmux3$XXdecoder$XX1sti$PTI_Out
+IC_CD4016_115,IC_CD4016_115
+IC_CD4016_114,IC_CD4016_114
+IC_CD4016_116,IC_CD4016_116
+XXalu$XXfa0$XXdecodeY$XX0nor$NP,XXalu$XXfa0$XXdecodeY$XX0nor$NP
+XREGISTER_A$XXtrit2$between,XREGISTER_A$XXtrit2$between
+IC_CD4016_113,IC_CD4016_113
+IC_CD4016_112,IC_CD4016_112
+XXalu$XXfa0$CTRL_SA,XXalu$XXfa0$CTRL_SA
+XXalu$XXfa0$CTRL_SC,XXalu$XXfa0$CTRL_SC
+XXalu$XXfa0$CTRL_SB,XXalu$XXfa0$CTRL_SB
+XXalu$XXfa0$XXdecodeY$XX0nor$NN,XXalu$XXfa0$XXdecodeY$XX0nor$NN
+XXalu$XXfa0$XXdecodeY$XX0nor$NI,XXalu$XXfa0$XXdecodeY$XX0nor$NI
+IC_CD4007_30,IC_CD4007_30
+XSTATUS_REG$XSlave$XXgatetop$NI,XSTATUS_REG$XSlave$XXgatetop$NI
+XSTATUS_REG$XSlave$XXgatetop$NN,XSTATUS_REG$XSlave$XXgatetop$NN
+XMUX_ALU_A$XXmux1$XXdecoder$IN_pti,XMUX_ALU_A$XXmux1$XXdecoder$IN_pti
+XSTATUS_REG$XSlave$XXlatch$NP,XSTATUS_REG$XSlave$XXlatch$NP
+XXalu$XXfa2$XX1$IN_pti,XXalu$XXfa2$XX1$IN_pti
+XSTATUS_REG$XSlave$XXgatetop$NP,XSTATUS_REG$XSlave$XXgatetop$NP
+XSTATUS_REG$XMaster$XXstiD$NTI_Out,XSTATUS_REG$XMaster$XXstiD$NTI_Out
+NX77,XXalu$XX1$XXcheckI3$XXdecoder$XXinti$PTI_Out
+XREGISTER_A$XXtrit1$XMaster$XXlatch$NI,XREGISTER_A$XXtrit1$XMaster$XXlatch$NI
+XPROGRAM_COUNTER$XMaster$XXstiD$NTI_Out,XPROGRAM_COUNTER$XMaster$XXstiD$NTI_Out
+XPROGRAM_COUNTER$XMaster$X_Xlatch$NN,XPROGRAM_COUNTER$XMaster$X_Xlatch$NN
+XREGISTER_A$XXtrit1$XMaster$XXlatch$NN,XREGISTER_A$XXtrit1$XMaster$XXlatch$NN
+XPROGRAM_COUNTER$XSlave$XXstiD$NTI_Out,XPROGRAM_COUNTER$XSlave$XXstiD$NTI_Out
+XPROGRAM_COUNTER$XMaster$X_Xlatch$NP,XPROGRAM_COUNTER$XMaster$X_Xlatch$NP
+XXalu$XXfa1$CTRL_YB,XXalu$XXfa1$CTRL_YB
+XXalu$XXfa1$CTRL_YC,XXalu$XXfa1$CTRL_YC
+XXalu$XXfa1$CTRL_YA,XXalu$XXfa1$CTRL_YA
+XX3$XX1sti$PTI_Out,XX3$XX1sti$PTI_Out
+XX1$XX1$XXmux3$XXdecoder$XX1pti$NTI_Out,XX1$XX1$XXmux3$XXdecoder$XX1pti$NTI_Out
+XJUMP_MUX$XXdecoder$XX1sti$NTI_Out,XJUMP_MUX$XXdecoder$XX1sti$NTI_Out
+XXalu$XXfa1$XXdecodeX$XX1sti$NTI_Out,XXalu$XXfa1$XXdecodeX$XX1sti$NTI_Out
+XJUMP_MUX$XXdecoder$XXinti$STI_Out,XJUMP_MUX$XXdecoder$XXinti$STI_Out
+XSTATUS_REG$XMaster$_Q_storage,XSTATUS_REG$XMaster$_Q_storage
+XXalu$XXfa0$XX1$XX1pti$STI_Out,XXalu$XXfa0$XX1$XX1pti$STI_Out
+XSTATUS_REG$XSlave$XXstiD$PTI_Out,XSTATUS_REG$XSlave$XXstiD$PTI_Out
+XXalu$XXnegB1$PTI_Out,XXalu$XXnegB1$PTI_Out
+XXalu$XXnegB2$NTI_Out,XXalu$XXnegB2$NTI_Out
+XXalu$XXfa2$CTRL_YA,XXalu$XXfa2$CTRL_YA
+XXalu$C1,XXalu$C1
+XXalu$XXfa2$CTRL_YC,XXalu$XXfa2$CTRL_YC
+XXalu$XXfa2$CTRL_YB,XXalu$XXfa2$CTRL_YB
+XXalu$XX1$XXcheckI3$XXdecoder$XX0nor$NN,XXalu$XX1$XXcheckI3$XXdecoder$XX0nor$NN
+IC_CD4007_149,IC_CD4007_149
+XXalu$XX1$XXcheckI3$XXdecoder$XX0nor$NP,XXalu$XX1$XXcheckI3$XXdecoder$XX0nor$NP
+XMUX_ALU_B$XXmux2$CTRL_B,XMUX_ALU_B$XXmux2$CTRL_B
+XMUX_ALU_B$XXmux2$CTRL_C,XMUX_ALU_B$XXmux2$CTRL_C
+XX1$XX1$XXmux2$XXdecoder$XX1pti$STI_Out,XX1$XX1$XXmux2$XXdecoder$XX1pti$STI_Out
+XMUX_ALU_B$XXmux2$CTRL_A,XMUX_ALU_B$XXmux2$CTRL_A
+IC_CD4007_140,IC_CD4007_140
+IC_CD4007_141,IC_CD4007_141
+XXalu$C2,XXalu$C2
+IC_CD4007_144,IC_CD4007_144
+IC_CD4007_145,IC_CD4007_145
+IC_CD4007_147,IC_CD4007_147
+XXalu$XXfa2$XX1$XXinti$PTI_Out,XXalu$XXfa2$XX1$XXinti$PTI_Out
+NX76,XXalu$XX1$XXcheckI3$XXdecoder$XX1sti$NTI_Out
+NX75,XXalu$XX1$XXcheckI2$XXdecoder$XXinti$STI_Out
+NX74,XXalu$XX1$XXcheckI3$XXdecoder$XX1pti$STI_Out
+NX73,XXalu$XX1$XXcheckI3$XXdecoder$XX1sti$PTI_Out
+NX72,XXalu$XX1$XXcheckI3$XXdecoder$XX1pti$NTI_Out
+NX71,XXalu$XX1$XXcheckI2$XXdecoder$XXinti$PTI_Out
+NX70,XXalu$XX1$XXcheckI2$XXdecoder$XX1pti$STI_Out
+IC_MDP1403-12K_198,IC_MDP1403-12K_198
+NX79,XXalu$XX1$XXcheckI1$XXdecoder$XX1pti$STI_Out
+NX78,XXalu$XX1$XXcheckI1$XXdecoder$XX1pti$NTI_Out
+XCYCLE_PC$XXsti$NTI_Out,XCYCLE_PC$XXsti$NTI_Out
+XREGISTER_A$XXtrit1$XMaster$_D,XREGISTER_A$XXtrit1$XMaster$_D
+XPROGRAM_COUNTER$XMaster$XXstiD$PTI_Out,XPROGRAM_COUNTER$XMaster$XXstiD$PTI_Out
+XREGISTER_A$XXtrit2$XSlave$XXgatetop$NP,XREGISTER_A$XXtrit2$XSlave$XXgatetop$NP
+XMUX_PC$XXdecoder$XX1sti$PTI_Out,XMUX_PC$XXdecoder$XX1sti$PTI_Out
+XJUMP_MUX$XXdecoder$XXinti$PTI_Out,XJUMP_MUX$XXdecoder$XXinti$PTI_Out
+IC_CD4016_59,IC_CD4016_59
+PC,PC
+XREGISTER_A$XXtrit2$XSlave$XXgatetop$NI,XREGISTER_A$XXtrit2$XSlave$XXgatetop$NI
+XREGISTER_A$XXtrit2$XSlave$XXgatetop$NN,XREGISTER_A$XXtrit2$XSlave$XXgatetop$NN
+XDO_CMP$XXsti_tand$NTI_Out,XDO_CMP$XXsti_tand$NTI_Out
+XXalu$XXfa2$XX1$XX1sti$PTI_Out,XXalu$XXfa2$XX1$XX1sti$PTI_Out
+IC_CD4016_55,IC_CD4016_55
+XCYCLE_PC$INI,XCYCLE_PC$INI
+XXalu$C3,XXalu$C3
+XXalu$XXfa0$XX1$XX1sti$NTI_Out,XXalu$XXfa0$XX1$XX1sti$NTI_Out
+IC_CD4007_97,IC_CD4007_97
+XPROGRAM_COUNTER$XSlave$XXlatch$NI,XPROGRAM_COUNTER$XSlave$XXlatch$NI
+XXalu$XXfa1$XX1$XX0nor$NP,XXalu$XXfa1$XX1$XX0nor$NP
+IC_CD4007_99,IC_CD4007_99
+IC_MDP1403-12K_41,IC_MDP1403-12K_41
+XREGISTER_A$XXtrit2$XMaster$X_Xlatch$NI,XREGISTER_A$XXtrit2$XMaster$X_Xlatch$NI
+XXalu$XXfa1$XX1$XX0nor$NI,XXalu$XXfa1$XX1$XX0nor$NI
+IC_MDP1403-12K_45,IC_MDP1403-12K_45
+XREGISTER_A$XXtrit2$XMaster$X_Xlatch$NN,XREGISTER_A$XXtrit2$XMaster$X_Xlatch$NN
+IC_MDP1403-12K_49,IC_MDP1403-12K_49
+IC_CD4016_152,IC_CD4016_152
+XX1$XX1$XXmux1$XXdecoder$XX0nor$NP,XX1$XX1$XXmux1$XXdecoder$XX0nor$NP
+XXalu$XXfa1$XXdecodeX$XXinti$PTI_Out,XXalu$XXfa1$XXdecodeX$XXinti$PTI_Out
+XXalu$XXfa0$XXdecodeY$XX1pti$STI_Out,XXalu$XXfa0$XXdecodeY$XX1pti$STI_Out
+IC_CD4016_100,IC_CD4016_100
+XXalu$XXfa1$XXdecodeY$XXinti$STI_Out,XXalu$XXfa1$XXdecodeY$XXinti$STI_Out
+XPROGRAM_COUNTER$XMaster$_D,XPROGRAM_COUNTER$XMaster$_D
+XMUX_ALU_A$XXmux2$XXdecoder$XX0nor$NI,XMUX_ALU_A$XXmux2$XXdecoder$XX0nor$NI
+XPROGRAM_COUNTER$XMaster$XXgatetop$NN,XPROGRAM_COUNTER$XMaster$XXgatetop$NN
+IC_MDP1403-12K_130,IC_MDP1403-12K_130
+XPROGRAM_COUNTER$XMaster$XXgatetop$NI,XPROGRAM_COUNTER$XMaster$XXgatetop$NI
+XMUX_ALU_A$XXmux2$XXdecoder$XX0nor$NN,XMUX_ALU_A$XXmux2$XXdecoder$XX0nor$NN
+XMUX_ALU_A$XXmux2$XXdecoder$XX0nor$NP,XMUX_ALU_A$XXmux2$XXdecoder$XX0nor$NP
+XXalu$XXfa1$XX1$XX0nor$NN,XXalu$XXfa1$XX1$XX0nor$NN
+XPROGRAM_COUNTER$XMaster$XXgatetop$NP,XPROGRAM_COUNTER$XMaster$XXgatetop$NP
+XREGISTER_A$XXtrit0$XSlave$_D,XREGISTER_A$XXtrit0$XSlave$_D
+XXalu$XXfa1$XXdecodeY$XXinti$PTI_Out,XXalu$XXfa1$XXdecodeY$XXinti$PTI_Out
+XREGISTER_A$XXtrit1$XSlave$_Q_storage,XREGISTER_A$XXtrit1$XSlave$_Q_storage
+XPROGRAM_COUNTER$XSlave$XXlatch$NN,XPROGRAM_COUNTER$XSlave$XXlatch$NN
+XPROGRAM_COUNTER$XMaster$XXlatch$NP,XPROGRAM_COUNTER$XMaster$XXlatch$NP
+XX1$XX1$XXmux3$XXdecoder$XXinti$STI_Out,XX1$XX1$XXmux3$XXdecoder$XXinti$STI_Out
+XXalu$XXfa2$CTRL_XB,XXalu$XXfa2$CTRL_XB
+XXalu$XXfa1$CTRL_SC,XXalu$XXfa1$CTRL_SC
+XREGISTER_A$XXtrit0$XSlave$XXlatch$NI,XREGISTER_A$XXtrit0$XSlave$XXlatch$NI
+XREGISTER_A$XXtrit0$XSlave$XXlatch$NN,XREGISTER_A$XXtrit0$XSlave$XXlatch$NN
+XX1$XX1$XXmux2$CTRL_A,XX1$XX1$XXmux2$CTRL_A
+XXalu$XXfa2$CTRL_XC,XXalu$XXfa2$CTRL_XC
+XX1$XX1$XXmux2$XXdecoder$XX0nor$NN,XX1$XX1$XXmux2$XXdecoder$XX0nor$NN
+XREGISTER_A$XXtrit0$XSlave$XXlatch$NP,XREGISTER_A$XXtrit0$XSlave$XXlatch$NP
+IC_CD4007_29,IC_CD4007_29
+IC_CD4007_22,IC_CD4007_22
+IC_CD4007_23,IC_CD4007_23
+IC_CD4007_21,IC_CD4007_21
+IC_CD4007_26,IC_CD4007_26
+IC_CD4007_27,IC_CD4007_27
+IC_CD4007_24,IC_CD4007_24
+XPROGRAM_COUNTER$XMaster$XXlatch$NI,XPROGRAM_COUNTER$XMaster$XXlatch$NI
+XX3$XXinti$STI_Out,XX3$XXinti$STI_Out
+XX1$XX1$XXmux3$XXdecoder$XX0nor$NP,XX1$XX1$XXmux3$XXdecoder$XX0nor$NP
+IC_MDP1403-12K_2,IC_MDP1403-12K_2
+XREGISTER_A$XXtrit0$XMaster$X_Xlatch$NP,XREGISTER_A$XXtrit0$XMaster$X_Xlatch$NP
+IC_MDP1403-12K_5,IC_MDP1403-12K_5
+XXalu$XXfa0$XXdecodeX$XX1pti$STI_Out,XXalu$XXfa0$XXdecodeX$XX1pti$STI_Out
+XX1$XX1$XXmux1$XXdecoder$XXinti$PTI_Out,XX1$XX1$XXmux1$XXdecoder$XXinti$PTI_Out
+IC_MDP1403-12K_9,IC_MDP1403-12K_9
+XX1$XX1$XXmux3$XXdecoder$XX0nor$NN,XX1$XX1$XXmux3$XXdecoder$XX0nor$NN
+XMUX_PC$XXdecoder$XX1sti$NTI_Out,XMUX_PC$XXdecoder$XX1sti$NTI_Out
+XPROGRAM_COUNTER$XMaster$XXlatch$NN,XPROGRAM_COUNTER$XMaster$XXlatch$NN
+IC_CD4007_171,IC_CD4007_171
+IC_CD4007_170,IC_CD4007_170
+IC_CD4007_172,IC_CD4007_172
+IC_CD4007_175,IC_CD4007_175
+IC_CD4007_159,IC_CD4007_159
+IC_CD4007_177,IC_CD4007_177
+XCYCLE_PC$XXpti$STI_Out,XCYCLE_PC$XXpti$STI_Out
+IC_CD4007_179,IC_CD4007_179
+IC_CD4007_178,IC_CD4007_178
+JUMP_ADDR,JUMP_ADDR
+XXalu$XXfa0$CTRL_YC,XXalu$XXfa0$CTRL_YC
+XXalu$XXfa0$CTRL_YB,XXalu$XXfa0$CTRL_YB
+XXalu$XXfa0$CTRL_YA,XXalu$XXfa0$CTRL_YA
+XXalu$XXfa1$XX1$XX1pti$STI_Out,XXalu$XXfa1$XX1$XX1pti$STI_Out
+NX84,XXalu$XX1$XXcheckI1$XXdecoder$XXinti$STI_Out
+IC_CD4007_189,IC_CD4007_189
+XMUX_ALU_B$XXmux2$XXdecoder$XX0nor$NI,XMUX_ALU_B$XXmux2$XXdecoder$XX0nor$NI
+XXalu$XXfa0$XXdecodeX$XXinti$PTI_Out,XXalu$XXfa0$XXdecodeX$XXinti$PTI_Out
+IC_CD4007_186,IC_CD4007_186
+IC_CD4007_187,IC_CD4007_187
+IC_CD4007_180,IC_CD4007_180
+IC_CD4007_182,IC_CD4007_182
+CLK_A,CLK_A
+XMUX_PC$CTRL_B,XMUX_PC$CTRL_B
+XMUX_PC$CTRL_C,XMUX_PC$CTRL_C
+XSTATUS_REG$XSlave$_D,XSTATUS_REG$XSlave$_D
+XMUX_PC$CTRL_A,XMUX_PC$CTRL_A
+IC_CD4007_151,IC_CD4007_151
+XBUF_A2$XXinv2$NTI_Out,XBUF_A2$XXinv2$NTI_Out
+NX81,XXalu$XX1$XXcheckI1$XXdecoder$XXinti$PTI_Out
+XXalu$XXfa1$XX1$XX1sti$NTI_Out,XXalu$XXfa1$XX1$XX1sti$NTI_Out
+XX3$XX1pti$STI_Out,XX3$XX1pti$STI_Out
+XMUX_ALU_B$XXmux3$CTRL_B,XMUX_ALU_B$XXmux3$CTRL_B
+XREGISTER_A$XXtrit0$XMaster$X_Xlatch$NN,XREGISTER_A$XXtrit0$XMaster$X_Xlatch$NN
+IC_CD4016_68,IC_CD4016_68
+XXalu$XXfa0$XX1$XX1pti$NTI_Out,XXalu$XXfa0$XX1$XX1pti$NTI_Out
+XREGISTER_A$XXtrit2$NC_01,XREGISTER_A$XXtrit2$NC_01
+NX38,XMUX_ALU_A$XXmux2$XXdecoder$XX1sti$PTI_Out
+XPROGRAM_COUNTER$XSlave$X_Xlatch$NI,XPROGRAM_COUNTER$XSlave$X_Xlatch$NI
+NX33,XMUX_ALU_A$XXmux1$XXdecoder$XXinti$PTI_Out
+NX32,XMUX_ALU_A$XXmux1$XXdecoder$XX1pti$STI_Out
+NX31,XMUX_ALU_A$XXmux1$XXdecoder$XX1pti$NTI_Out
+NX30,XREGISTER_A$XXtrit2$XSlave$XXstiD$NTI_Out
+NX37,XMUX_ALU_A$XXmux1$XXdecoder$XXinti$STI_Out
+XREGISTER_A$XXtrit2$XXstiCLK$NTI_Out,XREGISTER_A$XXtrit2$XXstiCLK$NTI_Out
+IC_CD4016_7,IC_CD4016_7
+NX34,XMUX_ALU_A$XXmux1$XXdecoder$XX1sti$NTI_Out
+I1,I1
+IC_CD4016_94,IC_CD4016_94
+I2,I2
+IC_CD4016_91,IC_CD4016_91
+IC_CD4016_90,IC_CD4016_90
+IC_CD4016_93,IC_CD4016_93
+IC_CD4016_92,IC_CD4016_92
+XSTATUS_REG$XSlave$XXstiD$NTI_Out,XSTATUS_REG$XSlave$XXstiD$NTI_Out
+IC_CD4016_203,IC_CD4016_203
+XXalu$XXfa0$XX1$XX0nor$NP,XXalu$XXfa0$XX1$XX0nor$NP
+XXalu$XXfa2$XXdecodeY$XXinti$PTI_Out,XXalu$XXfa2$XXdecodeY$XXinti$PTI_Out
+IS_BE,IS_BE
+XREGISTER_A$XXtrit2$XMaster$_D,XREGISTER_A$XXtrit2$XMaster$_D
+XXalu$XXfa2$CTRL_SC,XXalu$XXfa2$CTRL_SC
+XXalu$XXfa2$CTRL_SB,XXalu$XXfa2$CTRL_SB
+XXalu$XXfa2$CTRL_SA,XXalu$XXfa2$CTRL_SA
+V$Xcg$VCLK,V$Xcg$VCLK
+XREGISTER_A$XXtrit0$XMaster$_D,XREGISTER_A$XXtrit0$XMaster$_D
+XBUF_A1$_IN,XBUF_A1$_IN
+IC_MDP1403-12K_87,IC_MDP1403-12K_87
+XX1$XX1$XXmux1$XXdecoder$XX1pti$STI_Out,XX1$XX1$XXmux1$XXdecoder$XX1pti$STI_Out
+IC_MDP1403-12K_83,IC_MDP1403-12K_83
+IC_CD4007_205,IC_CD4007_205
+IC_MDP1403-12K_80,IC_MDP1403-12K_80
+NX64,XMUX_ALU_B$XXmux3$XXdecoder$XX1pti$STI_Out
+XXalu$0,XXalu$0
+XXalu$XXfa2$XXdecodeX$IN_pti,XXalu$XXfa2$XXdecodeX$IN_pti
+XREGISTER_A$XXtrit0$XSlave$X_Xlatch$NP,XREGISTER_A$XXtrit0$XSlave$X_Xlatch$NP
+XX1$XX1$XXmux1$XXdecoder$IN_pti,XX1$XX1$XXmux1$XXdecoder$IN_pti
+XX1$XX1$XXmux3$XXdecoder$XX1sti$NTI_Out,XX1$XX1$XXmux3$XXdecoder$XX1sti$NTI_Out
+XREGISTER_A$XXtrit0$XSlave$X_Xlatch$NI,XREGISTER_A$XXtrit0$XSlave$X_Xlatch$NI
+XREGISTER_A$XXtrit0$XSlave$X_Xlatch$NN,XREGISTER_A$XXtrit0$XSlave$X_Xlatch$NN
+IC_MDP1403-12K_173,IC_MDP1403-12K_173
+IC_MDP1403-12K_176,IC_MDP1403-12K_176
+XX1$XX1$XXmux3$XXdecoder$IN_pti,XX1$XX1$XXmux3$XXdecoder$IN_pti
+XXalu$XXfa1$XXdecodeY$XX1sti$PTI_Out,XXalu$XXfa1$XXdecodeY$XX1sti$PTI_Out
+XXalu$XX1$XXcheckI1$XXdecoder$XX0nor$NN,XXalu$XX1$XXcheckI1$XXdecoder$XX0nor$NN
+XXalu$XX1$XXcheckI1$XXdecoder$XX0nor$NI,XXalu$XX1$XXcheckI1$XXdecoder$XX0nor$NI
+IC_CD4007_69,IC_CD4007_69
+IC_CD4007_66,IC_CD4007_66
+IC_MDP1403-12K_12,IC_MDP1403-12K_12
+IC_CD4007_65,IC_CD4007_65
+IC_CD4007_62,IC_CD4007_62
+IC_CD4007_63,IC_CD4007_63
+IC_CD4007_60,IC_CD4007_60
+IC_MDP1403-12K_17,IC_MDP1403-12K_17
+IC_MDP1403-12K_191,IC_MDP1403-12K_191
+XXalu$XXfa0$XXdecodeX$XX1sti$NTI_Out,XXalu$XXfa0$XXdecodeX$XX1sti$NTI_Out
+IC_MDP1403-12K_195,IC_MDP1403-12K_195
+A1_BUF,A1_BUF
+XXalu$XX1$XXcheckI1$XXdecoder$XX0nor$NP,XXalu$XX1$XXcheckI1$XXdecoder$XX0nor$NP
+NX5,XREGISTER_A$XXtrit0$XMaster$XXgatebot$NP
+NX4,XREGISTER_A$XXtrit0$XMaster$XXgatetop$NN
+NX7,XREGISTER_A$XXtrit0$XMaster$XXgatetop$NI
+NX6,XREGISTER_A$XXtrit0$XMaster$XXgatebot$NN
+NX1,XREGISTER_A$XXtrit0$XMaster$XXstiD$PTI_Out
+XXalu$XXfa1$A3,XXalu$XXfa1$A3
+NX3,XREGISTER_A$XXtrit0$XMaster$XXgatetop$NP
+NX2,XREGISTER_A$XXtrit0$XMaster$XXstiD$NTI_Out
+NX9,XREGISTER_A$XXtrit0$XSlave$XXstiD$PTI_Out
+NX8,XREGISTER_A$XXtrit0$XMaster$XXgatebot$NI
+IC_CD4016_108,IC_CD4016_108
+IC_CD4016_109,IC_CD4016_109
+XBUF_A0$XXinv2$PTI_Out,XBUF_A0$XXinv2$PTI_Out
+IC_MDP1403-12K_146,IC_MDP1403-12K_146
+A2_BUF,A2_BUF
+XXalu$XXfa2$CTRL_XA,XXalu$XXfa2$CTRL_XA
+XREGISTER_A$XXtrit2$XMaster$X_Xlatch$NP,XREGISTER_A$XXtrit2$XMaster$X_Xlatch$NP
+XXalu$XX1$XXcheckI2$XXdecoder$XX0nor$NN,XXalu$XX1$XXcheckI2$XXdecoder$XX0nor$NN
+XDO_LWI$XXsti_tand$PTI_Out,XDO_LWI$XXsti_tand$PTI_Out
+XPROGRAM_COUNTER$XSlave$_Q_storage,XPROGRAM_COUNTER$XSlave$_Q_storage
+XXalu$XX1$XXcheckI2$XXdecoder$XX0nor$NI,XXalu$XX1$XXcheckI2$XXdecoder$XX0nor$NI
+XREGISTER_A$XXtrit1$XXstiCLK$NTI_Out,XREGISTER_A$XXtrit1$XXstiCLK$NTI_Out
+IC_MDP1403-12K_206,IC_MDP1403-12K_206
+XX1$XX1$XXmux2$XXdecoder$XXinti$STI_Out,XX1$XX1$XXmux2$XXdecoder$XXinti$STI_Out
+XXalu$XXnegB0$PTI_Out,XXalu$XXnegB0$PTI_Out
+XXalu$XXfa0$XX1$XX0nor$NI,XXalu$XXfa0$XX1$XX0nor$NI
+XXalu$XXfa1$XXdecodeY$XX1pti$NTI_Out,XXalu$XXfa1$XXdecodeY$XX1pti$NTI_Out
+NEXT_PC,NEXT_PC
+IS_LWI,IS_LWI
+XXalu$XX1$XXcheckI2$XXdecoder$XX0nor$NP,XXalu$XX1$XXcheckI2$XXdecoder$XX0nor$NP
+XPROGRAM_COUNTER$XSlave$Q_storage,XPROGRAM_COUNTER$XSlave$Q_storage
+XCYCLE_PC$XXnti$STI_Out,XCYCLE_PC$XXnti$STI_Out
+XJUMP_MUX$XXdecoder$XX0nor$NI,XJUMP_MUX$XXdecoder$XX0nor$NI
+XJUMP_MUX$XXdecoder$XX0nor$NN,XJUMP_MUX$XXdecoder$XX0nor$NN
+XXalu$XXfa0$XX1$XXinti$STI_Out,XXalu$XXfa0$XX1$XXinti$STI_Out
+XX1$XX1$XXmux2$XXdecoder$XX0nor$NI,XX1$XX1$XXmux2$XXdecoder$XX0nor$NI
+XCYCLE_PC$_IN_PTI,XCYCLE_PC$_IN_PTI
+XXalu$XXfa1$CTRL_CB,XXalu$XXfa1$CTRL_CB
+XXalu$XXfa1$CTRL_CC,XXalu$XXfa1$CTRL_CC
+IC_CD4016_96,IC_CD4016_96
+XXalu$XXfa2$XX1$XX1sti$NTI_Out,XXalu$XXfa2$XX1$XX1sti$NTI_Out
+XX1$XX1$XXmux2$XXdecoder$XX1sti$PTI_Out,XX1$XX1$XXmux2$XXdecoder$XX1sti$PTI_Out
+IC_CD4007_128,IC_CD4007_128
+IC_CD4007_129,IC_CD4007_129
+IC_CD4007_126,IC_CD4007_126
+IC_CD4007_124,IC_CD4007_124
+IC_CD4007_125,IC_CD4007_125
+XREGISTER_A$XXtrit0$XMaster$Q_storage,XREGISTER_A$XXtrit0$XMaster$Q_storage
+IC_CD4007_120,IC_CD4007_120
+XXalu$XXfa1$XXdecodeY$XX1pti$STI_Out,XXalu$XXfa1$XXdecodeY$XX1pti$STI_Out
+XPROGRAM_COUNTER$XSlave$XXgatebot$NN,XPROGRAM_COUNTER$XSlave$XXgatebot$NN
+XMUX_PC$XXdecoder$XX1pti$STI_Out,XMUX_PC$XXdecoder$XX1pti$STI_Out
+XREGISTER_A$XXtrit0$NC_01,XREGISTER_A$XXtrit0$NC_01
+XXalu$XXfa0$XXdecodeY$XXinti$STI_Out,XXalu$XXfa0$XXdecodeY$XXinti$STI_Out
+XXalu$XXfa1$XX1$XX1sti$PTI_Out,XXalu$XXfa1$XX1$XX1sti$PTI_Out
+XX1$XX1$XXmux1$XXdecoder$XX1sti$NTI_Out,XX1$XX1$XXmux1$XXdecoder$XX1sti$NTI_Out
+XXalu$XXfa1$XXdecodeY$XX0nor$NP,XXalu$XXfa1$XXdecodeY$XX0nor$NP
+FETCH,FETCH
+XXalu$XXfa1$XXdecodeY$XX0nor$NI,XXalu$XXfa1$XXdecodeY$XX0nor$NI
+XXalu$XXfa2$XXdecodeX$XX1sti$NTI_Out,XXalu$XXfa2$XXdecodeX$XX1sti$NTI_Out
+XCYCLE_PC$_IN,XCYCLE_PC$_IN
+XXalu$XXfa1$XXdecodeY$XX0nor$NN,XXalu$XXfa1$XXdecodeY$XX0nor$NN
+XMUX_ALU_A$XXmux3$XXdecoder$XX0nor$NN,XMUX_ALU_A$XXmux3$XXdecoder$XX0nor$NN
+XMUX_ALU_A$XXmux3$XXdecoder$XX0nor$NI,XMUX_ALU_A$XXmux3$XXdecoder$XX0nor$NI
+IC_CD4007_174,IC_CD4007_174
+Xcg$Xinvert_clk$NTI_Out,Xcg$Xinvert_clk$NTI_Out
+XPROGRAM_COUNTER$XMaster$XXgatebot$NI,XPROGRAM_COUNTER$XMaster$XXgatebot$NI
+XPROGRAM_COUNTER$XMaster$XXgatebot$NN,XPROGRAM_COUNTER$XMaster$XXgatebot$NN
+NX42,XMUX_ALU_A$XXmux2$XXdecoder$XXinti$STI_Out
+NX43,XMUX_ALU_A$XXmux3$XXdecoder$XX1pti$NTI_Out
+NX40,XMUX_ALU_A$XXmux2$XXdecoder$XX1pti$NTI_Out
+NX41,XMUX_ALU_A$XXmux2$XXdecoder$XXinti$PTI_Out
+NX46,XMUX_ALU_A$XXmux3$XXdecoder$XXinti$PTI_Out
+NX47,XMUX_ALU_A$XXmux3$XXdecoder$XXinti$STI_Out
+NX44,XMUX_ALU_A$XXmux3$XXdecoder$XX1sti$PTI_Out
+NX45,XMUX_ALU_A$XXmux3$XXdecoder$XX1sti$NTI_Out
+NX48,XMUX_ALU_A$XXmux3$XXdecoder$XX1pti$STI_Out
+NX49,XMUX_ALU_B$XXmux1$XXdecoder$XX1pti$NTI_Out
+XMUX_ALU_A$XXmux3$XXdecoder$XX0nor$NP,XMUX_ALU_A$XXmux3$XXdecoder$XX0nor$NP
+XMUX_ALU_A$XXmux3$CTRL_B,XMUX_ALU_A$XXmux3$CTRL_B
+XMUX_ALU_A$XXmux3$CTRL_C,XMUX_ALU_A$XXmux3$CTRL_C
+XX1$XX1$XXmux2$CTRL_C,XX1$XX1$XXmux2$CTRL_C
+XMUX_ALU_A$XXmux3$CTRL_A,XMUX_ALU_A$XXmux3$CTRL_A
+XBUF_A0$_IN,XBUF_A0$_IN
+XCYCLE_PC$XXnti$PTI_Out,XCYCLE_PC$XXnti$PTI_Out
+XJUMP_MUX$XXdecoder$XX1pti$NTI_Out,XJUMP_MUX$XXdecoder$XX1pti$NTI_Out
+XX1$0,XX1$0
+XXalu$XXfa0$CTRL_XA,XXalu$XXfa0$CTRL_XA
+XXalu$XXfa0$CTRL_XB,XXalu$XXfa0$CTRL_XB
+XXalu$XXfa0$CTRL_XC,XXalu$XXfa0$CTRL_XC
+XXalu$XXfa2$XX1$XX1pti$NTI_Out,XXalu$XXfa2$XX1$XX1pti$NTI_Out
+IC_CD4016_148,IC_CD4016_148
+IC_MDP1403-12K_57,IC_MDP1403-12K_57
+IC_MDP1403-12K_52,IC_MDP1403-12K_52
+IC_CD4016_143,IC_CD4016_143
+XREGISTER_A$XXtrit1$XSlave$X_Xlatch$NN,XREGISTER_A$XXtrit1$XSlave$X_Xlatch$NN
+XDO_LWI$XXtnand$NP,XDO_LWI$XXtnand$NP
+XREGISTER_A$XXtrit0$XSlave$XXgatebot$NP,XREGISTER_A$XXtrit0$XSlave$XXgatebot$NP
+IC_MDP1403-12K_123,IC_MDP1403-12K_123
+IC_MDP1403-12K_127,IC_MDP1403-12K_127
+XREGISTER_A$XXtrit0$XSlave$XXgatebot$NN,XREGISTER_A$XXtrit0$XSlave$XXgatebot$NN
+XSTATUS_REG$XXstiCLK$PTI_Out,XSTATUS_REG$XXstiCLK$PTI_Out
+XDO_LWI$XXtnand$NN,XDO_LWI$XXtnand$NN
+XDO_LWI$XXtnand$NI,XDO_LWI$XXtnand$NI
+XREGISTER_A$XXtrit0$XSlave$XXgatebot$NI,XREGISTER_A$XXtrit0$XSlave$XXgatebot$NI
+IC_MDP1403-12K_20,IC_MDP1403-12K_20
+XXalu$XXnegB2$PTI_Out,XXalu$XXnegB2$PTI_Out
+IC_MDP1403-12K_25,IC_MDP1403-12K_25
+XXalu$XXfa1$CTRL_C0C,XXalu$XXfa1$CTRL_C0C
+XXalu$XXfa1$CTRL_C0B,XXalu$XXfa1$CTRL_C0B
+IC_MDP1403-12K_28,IC_MDP1403-12K_28
+IC_CD4007_35,IC_CD4007_35
+IC_CD4007_34,IC_CD4007_34
+IC_CD4007_36,IC_CD4007_36
+IC_CD4007_31,IC_CD4007_31
+Vdd,$G_Vdd
+IC_CD4007_32,IC_CD4007_32
+IC_CD4016_111,IC_CD4016_111
+XBUF_A1$XXinv2$NTI_Out,XBUF_A1$XXinv2$NTI_Out
+IC_CD4007_39,IC_CD4007_39
+IC_CD4007_38,IC_CD4007_38
+IC_CD4016_110,IC_CD4016_110
+XXalu$XXfa2$XX1$XX0nor$NN,XXalu$XXfa2$XX1$XX0nor$NN
+XMUX_ALU_B$XXmux1$XXdecoder$XX0nor$NI,XMUX_ALU_B$XXmux1$XXdecoder$XX0nor$NI
+XX1$XX1$XXmux3$XXdecoder$XX0nor$NI,XX1$XX1$XXmux3$XXdecoder$XX0nor$NI
+XMUX_ALU_B$XXmux1$XXdecoder$XX0nor$NN,XMUX_ALU_B$XXmux1$XXdecoder$XX0nor$NN
+XCYCLE_PC$XXtnor1$NN,XCYCLE_PC$XXtnor1$NN
+XXalu$XXfa2$CTRL_CC,XXalu$XXfa2$CTRL_CC
+XREGISTER_A$XXtrit1$XMaster$X_Xlatch$NN,XREGISTER_A$XXtrit1$XMaster$X_Xlatch$NN
+XREGISTER_A$XXtrit1$XMaster$X_Xlatch$NI,XREGISTER_A$XXtrit1$XMaster$X_Xlatch$NI
+XCYCLE_PC$XXtnor1$NI,XCYCLE_PC$XXtnor1$NI
+XXalu$XXfa0$XXdecodeX$XX1sti$PTI_Out,XXalu$XXfa0$XXdecodeX$XX1sti$PTI_Out
+XSTATUS_REG$XMaster$X_Xlatch$NI,XSTATUS_REG$XMaster$X_Xlatch$NI
+XREGISTER_A$XXtrit1$XMaster$X_Xlatch$NP,XREGISTER_A$XXtrit1$XMaster$X_Xlatch$NP
+XCYCLE_PC$XXtnor1$NP,XCYCLE_PC$XXtnor1$NP
+XMUX_ALU_B$XXmux1$XXdecoder$XX0nor$NP,XMUX_ALU_B$XXmux1$XXdecoder$XX0nor$NP
+XXalu$XXfa2$XXdecodeY$XX1pti$STI_Out,XXalu$XXfa2$XXdecodeY$XX1pti$STI_Out
+XPROGRAM_COUNTER$XSlave$XXgatebot$NI,XPROGRAM_COUNTER$XSlave$XXgatebot$NI
+IC_CD4007_162,IC_CD4007_162
+IC_CD4007_163,IC_CD4007_163
+IC_CD4007_160,IC_CD4007_160
+IC_CD4007_166,IC_CD4007_166
+IC_CD4007_167,IC_CD4007_167
+IC_CD4007_165,IC_CD4007_165
+S,S
+IC_CD4007_169,IC_CD4007_169
+XXalu$XX1$XXcheckI3$XXdecoder$IN_pti,XXalu$XX1$XXcheckI3$XXdecoder$IN_pti
+XBUF_A2$XXinv1$NTI_Out,XBUF_A2$XXinv1$NTI_Out
+XSTATUS_REG$XMaster$X_Xlatch$NN,XSTATUS_REG$XMaster$X_Xlatch$NN
+XCYCLE_PC$XXsti$PTI_Out,XCYCLE_PC$XXsti$PTI_Out
+XXalu$XXfa1$XXdecodeX$IN_pti,XXalu$XXfa1$XXdecodeX$IN_pti
+XXalu$XXfa1$XX1$XXinti$PTI_Out,XXalu$XXfa1$XX1$XXinti$PTI_Out
+XSTATUS_REG$XMaster$X_Xlatch$NP,XSTATUS_REG$XMaster$X_Xlatch$NP
+XREGISTER_A$XXtrit0$XXstiCLK$PTI_Out,XREGISTER_A$XXtrit0$XXstiCLK$PTI_Out
+IC_CD4016_121,IC_CD4016_121
+A1,A1
+A0,A0
+A2,A2
+XMUX_ALU_A$XXmux2$CTRL_A,XMUX_ALU_A$XXmux2$CTRL_A
+XMUX_ALU_A$XXmux2$CTRL_C,XMUX_ALU_A$XXmux2$CTRL_C
+XMUX_ALU_A$XXmux2$CTRL_B,XMUX_ALU_A$XXmux2$CTRL_B
+XXalu$XX1$XXcheckI1$CTRL_A,XXalu$XX1$XXcheckI1$CTRL_A
+XXalu$XX1$XXcheckI1$CTRL_C,XXalu$XX1$XXcheckI1$CTRL_C
+XXalu$XX1$XXcheckI1$CTRL_B,XXalu$XX1$XXcheckI1$CTRL_B
+IC_CD4016_73,IC_CD4016_73
+XREGISTER_A$XXtrit1$XMaster$Q_storage,XREGISTER_A$XXtrit1$XMaster$Q_storage
+XSTATUS_REG$XMaster$XXgatebot$NI,XSTATUS_REG$XMaster$XXgatebot$NI
+XX1$XX1$XXmux1$XXdecoder$XX1sti$PTI_Out,XX1$XX1$XXmux1$XXdecoder$XX1sti$PTI_Out
+IC_CD4016_77,IC_CD4016_77
+XSTATUS_REG$XMaster$XXgatebot$NN,XSTATUS_REG$XMaster$XXgatebot$NN
+XSTATUS_REG$NC_01,XSTATUS_REG$NC_01
+XXalu$XXfa1$XX1$XX1pti$NTI_Out,XXalu$XXfa1$XX1$XX1pti$NTI_Out
+XXalu$XXfa0$CTRL_CA,XXalu$XXfa0$CTRL_CA
+XXalu$XXfa0$CTRL_CC,XXalu$XXfa0$CTRL_CC
+XXalu$XXfa0$CTRL_CB,XXalu$XXfa0$CTRL_CB
+XJUMP_MUX$CTRL_C,XJUMP_MUX$CTRL_C
+XJUMP_MUX$CTRL_B,XJUMP_MUX$CTRL_B
+XJUMP_MUX$CTRL_A,XJUMP_MUX$CTRL_A
+PC_PLUS_1,PC_PLUS_1
+XXalu$XXfa2$XXdecodeY$XX1pti$NTI_Out,XXalu$XXfa2$XXdecodeY$XX1pti$NTI_Out
+XDO_CMP$XXsti_tand$PTI_Out,XDO_CMP$XXsti_tand$PTI_Out
+XDO_CMP$XXtnand$NI,XDO_CMP$XXtnand$NI
+XSTATUS_REG$XMaster$Q_storage,XSTATUS_REG$XMaster$Q_storage
+XDO_CMP$XXtnand$NN,XDO_CMP$XXtnand$NN
+XDO_CMP$XXtnand$NP,XDO_CMP$XXtnand$NP
+XREGISTER_A$XXtrit1$NC_01,XREGISTER_A$XXtrit1$NC_01
+ALU_IN_B2,ALU_IN_B2
+ALU_IN_B0,ALU_IN_B0
+ALU_IN_B1,ALU_IN_B1
+XDO_LWI$XXsti_tand$NTI_Out,XDO_LWI$XXsti_tand$NTI_Out
diff --git a/bb/main.net b/bb/main.net
index 66ca713..16c66a2 100755
--- a/bb/main.net
+++ b/bb/main.net
@@ -1,22 +1,22 @@
 * Z:\trinary\code\circuits\main.asc
 XX2 $G_Vdd $G_Vss tpower
 XCYCLE_PC PC PC_PLUS_1 tcycle_up
-XMUX_PC PC_PLUS_1 0 0 CTRL_PC NEXT_ADDR mux3-1
-V1 CTRL_PC 0 PWL(0 0 5u 0 5.1u -5)
+XMUX_PC PC_PLUS_1 0 JUMP_ADDR IS_BE NEXT_PC mux3-1
 XX3 I0_opcode IS_CMP IS_LWI IS_BE decoder1-3
 XREGISTER_A I2 CLK_A A2 I1 A1 A0 0 trit_reg3
 XDO_LWI IS_LWI EXECUTE CLK_A min
-XMUX_ALU_A $G_Vdd 0 $G_Vss 0 0 0 A0_BUF A1_BUF A2_BUF I1 ALU_IN_A2 ALU_IN_A1 ALU_IN_A0 mux9-3
-XMUX_ALU_B $G_Vdd 0 $G_Vss 0 0 0 A0_BUF A1_BUF A2_BUF I2 ALU_IN_B2 ALU_IN_B1 ALU_IN_B0 mux9-3
+XMUX_ALU_A 0 $G_Vss 0 0 0 0 A0_BUF A1_BUF A2_BUF I1 ALU_IN_A0 ALU_IN_A1 ALU_IN_A2 mux9-3
+XMUX_ALU_B 0 $G_Vss 0 0 0 0 A0_BUF A1_BUF A2_BUF I2 ALU_IN_B0 ALU_IN_B1 ALU_IN_B2 mux9-3
 XDO_CMP IS_CMP EXECUTE CLK_STATUS min
-XXalu ALU_IN_A0 ALU_IN_A1 ALU_IN_A2 ALU_IN_B0 ALU_IN_B1 ALU_IN_B2 S_IN alu
+XXalu ALU_IN_A2 ALU_IN_A1 ALU_IN_A0 ALU_IN_B2 ALU_IN_B1 ALU_IN_B0 S_IN alu
 Xcg FETCH EXECUTE clock_gen
-XX1 PC I0_opcode I1 I2 swrom-cmptest
-XPROGRAM_COUNTER NEXT_ADDR FETCH PC NC_01 dtflop-ms2
+XPROGRAM_COUNTER NEXT_PC FETCH PC NC_01 dtflop-ms2
 XSTATUS_REG S_IN CLK_STATUS S NC_02 dtflop-ms2
 XBUF_A1 A1 A1_BUF tbuf
 XBUF_A0 A0 A0_BUF tbuf
 XBUF_A2 A2 A2_BUF tbuf
+XJUMP_MUX I2 I1 I2 S JUMP_ADDR mux3-1
+XX1 PC I0_opcode I1 I2 swrom-guess
 
 * block symbol definitions
 .subckt tpower Vdd Vss
@@ -63,26 +63,21 @@ XXmux2 IiB I0B I1B S QB mux3-1
 XXmux3 IiC I0C I1C S QC mux3-1
 .ends mux9-3
 
-.subckt alu A0 A1 A2 B0 B1 B2 S
-XXfa0 A0 C1 S0 N001 0 full_adder
-XXfa1 A1 C2 S1 N002 C1 full_adder
-XXfa2 A2 S2 C3 N003 C2 full_adder
-XX1 S0 S1 S2 S B3 tsign4
-XXnegB0 B0 N001 sti
-XXnegB1 B1 N002 sti
-XXnegB2 B2 N003 sti
-XXnegCarry C3 B3 sti
+.subckt alu A2 A1 A0 B2 B1 B0 S
+XXfa0 A0 C1 S0 _B0 0 full_adder
+XXfa1 A1 C2 S1 _B1 C1 full_adder
+XXfa2 A2 C3 S2 _B2 C2 full_adder
+XX1 S0 S1 S2 S C3 tsign4
+XXnegB0 B0 _B0 sti
+XXnegB1 B1 _B1 sti
+XXnegB2 B2 _B2 sti
 .ends alu
 
 .subckt clock_gen FETCH EXECUTE
-V§CLK_F1 FETCH 0 PULSE(-5 5 3u 1n 1n 30u 60u)
-V§CLK_X1 EXECUTE 0 PULSE(-5 5 10u 1n 1n 30u 60u)
+VCLK EXECUTE 0 PULSE(-5 5 30u 1n 1n 30u 60u)
+Xinvert_clk EXECUTE FETCH sti
 .ends clock_gen
 
-.subckt swrom-cmptest ADDRESS D0 D1 D2
-XX1 $G_Vss $G_Vdd $G_Vss 0 $G_Vss 0 $G_Vss $G_Vss $G_Vdd ADDRESS D2 D1 D0 mux9-3
-.ends swrom-cmptest
-
 .subckt dtflop-ms2 D CLK Q _Q
 XMaster D _CLK between NC_01 dtflop
 XSlave between CLK Q _Q dtflop
@@ -94,6 +89,10 @@ XXinv1 IN _IN sti
 XXinv2 _IN OUT sti
 .ends tbuf
 
+.subckt swrom-guess ADDRESS D0 D1 D2
+XX1 $G_Vdd 0 $G_Vdd 0 $G_Vss 0 $G_Vss $G_Vss $G_Vdd ADDRESS D2 D1 D0 mux9-3
+.ends swrom-guess
+
 .subckt nti IN OUT
 Xinv IN NC_01 NC_02 OUT tinv
 .ends nti
@@ -204,15 +203,21 @@ MP PTI_Out Vin $G_Vdd $G_Vdd CD4007P
 
 .model NMOS NMOS
 .model PMOS PMOS
-.lib C:\PROGRA~1\LTC\SwCADIII\lib\cmp\standard.mos
+.lib C:\Program Files\LTC\SwCADIII\lib\cmp\standard.mos
 .tran 320u
-* Reset address
-* Should result in S = _1, _1, 1
 * IN "Register"\n(User input)
 * OUT "Register"\n(Cannot read from)
 * A Register
 * IN "Register"\n(User input)
 * OUT "Register"\n(Cannot read from)
 * A Register
+* =
+* <
+* >
+* guess.t
+* LWI Instruction
+* CMP Instruction
+* BE Instruction
+* 3-TRIT TRINARY COMPUTER ARCHITECTURE
 .backanno
 .end
-- 
2.11.4.GIT