10 WIRE 224 160 208 160
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11 WIRE 208 224 208 160
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12 WIRE 288 224 208 224
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15 WIRE 176 256 176 128
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16 WIRE 288 256 288 224
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17 WIRE -16 352 -16 336
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20 WIRE 176 352 176 336
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22 WIRE 288 352 288 336
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23 WIRE 288 352 176 352
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25 FLAG -144 112 $G_Vdd
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26 FLAG -144 176 $G_Vss
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34 SYMBOL voltage 176 240 R0
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35 WINDOW 3 -29 134 Left 0
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36 WINDOW 123 0 0 Left 0
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37 WINDOW 39 0 0 Left 0
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38 SYMATTR Value PWL file=input_n.txt
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40 SYMBOL voltage 80 240 R0
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41 WINDOW 3 -88 180 Left 0
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42 WINDOW 123 0 0 Left 0
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43 WINDOW 39 0 0 Left 0
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44 SYMATTR Value PWL file=input_z.txt
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46 SYMBOL voltage -16 240 R0
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47 WINDOW 3 -239 108 Left 0
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48 WINDOW 123 0 0 Left 0
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49 WINDOW 39 0 0 Left 0
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50 SYMATTR Value PWL file=input_p.txt
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52 SYMBOL tpower -144 144 R0
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54 SYMBOL pznflop 272 16 R0
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56 SYMBOL voltage 288 240 R0
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57 SYMATTR InstName VCLK
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59 TEXT -256 440 Left 0 !.tran 0 65ns 35ns
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60 TEXT -256 408 Left 0 !;tran 40ns
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61 TEXT -88 -96 Left 0 ;WARNING: UNTESTED\nPulsing Z does not appear to set the flip-flop to zero.\nNote: may be testing it incorrectly. Mouftah says that\nthe inputs will change with a *pulse* on CLK.
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