| tag | 2d37d4dc2df93c15abd7071e2358afa2d7801cb3 | |
| object | aca3ed36102d1d983bafe91e3b867b8834c6c7cc | commit |
| author | Cédric VINCENT <cedric.vincent@st.com> | |
| Wed, 3 Nov 2010 12:17:57 +0000 (3 13:17 +0100) |
Tamarin/NanoJIT/SH4 1.0 Release Notes
=====================================
We are proud to announce the first *optimized* release of
Tamarin/NanoJIT for SH4 and ST40 CPUs. The following table summarizes
the *speed-up* due to the JITter against the "performance" testsuite
(without "asmicro") on several architectures:
| | X64 | x86 | ARM | SH4/ST40 |
|-------------------+------------+---------+---------------+--------------|
| CPU model | Xeon E5405 | Xeon | 88FR131 v5TEL | ST40 Stx7108 |
| BogoMIPS | 3990 | 5581.29 | 1193 | 499 |
|-------------------+------------+---------+---------------+--------------|
| Interp / Full JIT | 2.72 | 2.61 | 1.42 | 3.21 |
| Interp / Mixed | 2.72 | 2.63 | 1.45 | 3.22 |
|-------------------+------------+---------+---------------+--------------|
As you can see the ratio "intepreted/JITted" is higher on SH4/ST40, it
means NanoJIT brings more benefits on SH4 than on other architectures.
For the next release, we will work on the following optimizations to
reach an expected speed-up of 3.5:
. create and use a constant-pool manager
. rework the high-level generation of "base+offset" to consider SH4 constraints
. add initial support for xtbl (jump table)
. try alternate CMOV implementation for SH4
. try to add support for "double" transfer mode
. try to add support for native mod/div code generation
Cédric
.
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=====================================
We are proud to announce the first *optimized* release of
Tamarin/NanoJIT for SH4 and ST40 CPUs. The following table summarizes
the *speed-up* due to the JITter against the "performance" testsuite
(without "asmicro") on several architectures:
| | X64 | x86 | ARM | SH4/ST40 |
|-------------------+------------+---------+---------------+--------------|
| CPU model | Xeon E5405 | Xeon | 88FR131 v5TEL | ST40 Stx7108 |
| BogoMIPS | 3990 | 5581.29 | 1193 | 499 |
|-------------------+------------+---------+---------------+--------------|
| Interp / Full JIT | 2.72 | 2.61 | 1.42 | 3.21 |
| Interp / Mixed | 2.72 | 2.63 | 1.45 | 3.22 |
|-------------------+------------+---------+---------------+--------------|
As you can see the ratio "intepreted/JITted" is higher on SH4/ST40, it
means NanoJIT brings more benefits on SH4 than on other architectures.
For the next release, we will work on the following optimizations to
reach an expected speed-up of 3.5:
. create and use a constant-pool manager
. rework the high-level generation of "base+offset" to consider SH4 constraints
. add initial support for xtbl (jump table)
. try alternate CMOV implementation for SH4
. try to add support for "double" transfer mode
. try to add support for native mod/div code generation
Cédric
.
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