Tamarin/NanoJIT/SH4 Beta1 Release Notes
=======================================
We are proud to announce the first release of Tamarin/NanoJIT for SH4
and ST40 CPUs. Currently, this version:
. Pass 100% of the "acceptance" test-suite.
. Pass 100% of the "performance" test-suite.
. Has no outstanding defects detected by Coverity Prevent 4.5.1 in
the new SH4 back-end.
For the next releases, we will work on:
. Find a way to trigger all the SH4 back-end code since two LIR
opcodes (fgt, fge) and four Assembler methods (asm_f2i,
asm_branch_xov, nFragExit, swapCodeChunks) are not covered by
the test-suites.
. Investigate the memory consumption since it appears the SH4 port
consumes a lot of memory compared to other back-ends.
. Integrate NanoJIT/SH4 into TraceMonkey.
. Add many SH4 specific optimizations.
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