Front SD ELF loader added
[svpe-wii.git] / sdelfloader / miniloader / source / asm.h
blob8e335b4376fbd87bce4100c57cb1b78ebf2cf1b0
1 // this file was taken from libogc, see http://www.devkitpro.org/
3 #ifndef __ASM_H__
4 #define __ASM_H__
6 #ifdef _LANGUAGE_ASSEMBLY
7 /* Condition Register Bit Fields */
9 #define cr0 0
10 #define cr1 1
11 #define cr2 2
12 #define cr3 3
13 #define cr4 4
14 #define cr5 5
15 #define cr6 6
16 #define cr7 7
19 /* General Purpose Registers (GPRs) */
21 #define r0 0
22 #define r1 1
23 #define sp 1
24 #define r2 2
25 #define toc 2
26 #define r3 3
27 #define r4 4
28 #define r5 5
29 #define r6 6
30 #define r7 7
31 #define r8 8
32 #define r9 9
33 #define r10 10
34 #define r11 11
35 #define r12 12
36 #define r13 13
37 #define r14 14
38 #define r15 15
39 #define r16 16
40 #define r17 17
41 #define r18 18
42 #define r19 19
43 #define r20 20
44 #define r21 21
45 #define r22 22
46 #define r23 23
47 #define r24 24
48 #define r25 25
49 #define r26 26
50 #define r27 27
51 #define r28 28
52 #define r29 29
53 #define r30 30
54 #define r31 31
57 /* Floating Point Registers (FPRs) */
59 #define fr0 0
60 #define fr1 1
61 #define fr2 2
62 #define fr3 3
63 #define fr4 4
64 #define fr5 5
65 #define fr6 6
66 #define fr7 7
67 #define fr8 8
68 #define fr9 9
69 #define fr10 10
70 #define fr11 11
71 #define fr12 12
72 #define fr13 13
73 #define fr14 14
74 #define fr15 15
75 #define fr16 16
76 #define fr17 17
77 #define fr18 18
78 #define fr19 19
79 #define fr20 20
80 #define fr21 21
81 #define fr22 22
82 #define fr23 23
83 #define fr24 24
84 #define fr25 25
85 #define fr26 26
86 #define fr27 27
87 #define fr28 28
88 #define fr29 29
89 #define fr30 30
90 #define fr31 31
92 #define vr0 0
93 #define vr1 1
94 #define vr2 2
95 #define vr3 3
96 #define vr4 4
97 #define vr5 5
98 #define vr6 6
99 #define vr7 7
100 #define vr8 8
101 #define vr9 9
102 #define vr10 10
103 #define vr11 11
104 #define vr12 12
105 #define vr13 13
106 #define vr14 14
107 #define vr15 15
108 #define vr16 16
109 #define vr17 17
110 #define vr18 18
111 #define vr19 19
112 #define vr20 20
113 #define vr21 21
114 #define vr22 22
115 #define vr23 23
116 #define vr24 24
117 #define vr25 25
118 #define vr26 26
119 #define vr27 27
120 #define vr28 28
121 #define vr29 29
122 #define vr30 30
123 #define vr31 31
125 #endif //_LANGUAGE_ASSEMBLY
127 #define SPRG0 272
128 #define SPRG1 273
129 #define SPRG2 274
130 #define SPRG3 275
132 #define PMC1 953
133 #define PMC2 954
134 #define PMC3 957
135 #define PMC4 958
137 #define MMCR0 952
138 #define MMCR1 956
141 #define LINK_REGISTER_CALLEE_UPDATE_ROOM 4
142 #define EXCEPTION_NUMBER 8
143 #define SRR0_OFFSET 12
144 #define SRR1_OFFSET 16
145 #define GPR0_OFFSET 20
146 #define GPR1_OFFSET 24
147 #define GPR2_OFFSET 28
148 #define GPR3_OFFSET 32
149 #define GPR4_OFFSET 36
150 #define GPR5_OFFSET 40
151 #define GPR6_OFFSET 44
152 #define GPR7_OFFSET 48
153 #define GPR8_OFFSET 52
154 #define GPR9_OFFSET 56
155 #define GPR10_OFFSET 60
156 #define GPR11_OFFSET 64
157 #define GPR12_OFFSET 68
158 #define GPR13_OFFSET 72
159 #define GPR14_OFFSET 76
160 #define GPR15_OFFSET 80
161 #define GPR16_OFFSET 84
162 #define GPR17_OFFSET 88
163 #define GPR18_OFFSET 92
164 #define GPR19_OFFSET 96
165 #define GPR20_OFFSET 100
166 #define GPR21_OFFSET 104
167 #define GPR22_OFFSET 108
168 #define GPR23_OFFSET 112
169 #define GPR24_OFFSET 116
170 #define GPR25_OFFSET 120
171 #define GPR26_OFFSET 124
172 #define GPR27_OFFSET 128
173 #define GPR28_OFFSET 132
174 #define GPR29_OFFSET 136
175 #define GPR30_OFFSET 140
176 #define GPR31_OFFSET 144
178 #define GQR0_OFFSET 148
179 #define GQR1_OFFSET 152
180 #define GQR2_OFFSET 156
181 #define GQR3_OFFSET 160
182 #define GQR4_OFFSET 164
183 #define GQR5_OFFSET 168
184 #define GQR6_OFFSET 172
185 #define GQR7_OFFSET 176
187 #define CR_OFFSET 180
188 #define LR_OFFSET 184
189 #define CTR_OFFSET 188
190 #define XER_OFFSET 192
191 #define MSR_OFFSET 196
192 #define DAR_OFFSET 200
194 #define STATE_OFFSET 204
195 #define MODE_OFFSET 206
197 #define FPR0_OFFSET 208
198 #define FPR1_OFFSET 216
199 #define FPR2_OFFSET 224
200 #define FPR3_OFFSET 232
201 #define FPR4_OFFSET 240
202 #define FPR5_OFFSET 248
203 #define FPR6_OFFSET 256
204 #define FPR7_OFFSET 264
205 #define FPR8_OFFSET 272
206 #define FPR9_OFFSET 280
207 #define FPR10_OFFSET 288
208 #define FPR11_OFFSET 296
209 #define FPR12_OFFSET 304
210 #define FPR13_OFFSET 312
211 #define FPR14_OFFSET 320
212 #define FPR15_OFFSET 328
213 #define FPR16_OFFSET 336
214 #define FPR17_OFFSET 344
215 #define FPR18_OFFSET 352
216 #define FPR19_OFFSET 360
217 #define FPR20_OFFSET 368
218 #define FPR21_OFFSET 376
219 #define FPR22_OFFSET 384
220 #define FPR23_OFFSET 392
221 #define FPR24_OFFSET 400
222 #define FPR25_OFFSET 408
223 #define FPR26_OFFSET 416
224 #define FPR27_OFFSET 424
225 #define FPR28_OFFSET 432
226 #define FPR29_OFFSET 440
227 #define FPR30_OFFSET 448
228 #define FPR31_OFFSET 456
230 #define FPSCR_OFFSET 464
232 #define PSR0_OFFSET 472
233 #define PSR1_OFFSET 480
234 #define PSR2_OFFSET 488
235 #define PSR3_OFFSET 496
236 #define PSR4_OFFSET 504
237 #define PSR5_OFFSET 512
238 #define PSR6_OFFSET 520
239 #define PSR7_OFFSET 528
240 #define PSR8_OFFSET 536
241 #define PSR9_OFFSET 544
242 #define PSR10_OFFSET 552
243 #define PSR11_OFFSET 560
244 #define PSR12_OFFSET 568
245 #define PSR13_OFFSET 576
246 #define PSR14_OFFSET 584
247 #define PSR15_OFFSET 592
248 #define PSR16_OFFSET 600
249 #define PSR17_OFFSET 608
250 #define PSR18_OFFSET 616
251 #define PSR19_OFFSET 624
252 #define PSR20_OFFSET 632
253 #define PSR21_OFFSET 640
254 #define PSR22_OFFSET 648
255 #define PSR23_OFFSET 656
256 #define PSR24_OFFSET 664
257 #define PSR25_OFFSET 672
258 #define PSR26_OFFSET 680
259 #define PSR27_OFFSET 688
260 #define PSR28_OFFSET 696
261 #define PSR29_OFFSET 704
262 #define PSR30_OFFSET 712
263 #define PSR31_OFFSET 720
265 * maintain the EABI requested 8 bytes aligment
266 * As SVR4 ABI requires 16, make it 16 (as some
267 * exception may need more registers to be processed...)
269 #define EXCEPTION_FRAME_END 728
271 #define IBAT0U 528
272 #define IBAT0L 529
273 #define IBAT1U 530
274 #define IBAT1L 531
275 #define IBAT2U 532
276 #define IBAT2L 533
277 #define IBAT3U 534
278 #define IBAT3L 535
279 #define IBAT4U 560
280 #define IBAT4L 561
281 #define IBAT5U 562
282 #define IBAT5L 563
283 #define IBAT6U 564
284 #define IBAT6L 565
285 #define IBAT7U 566
286 #define IBAT7L 567
288 #define DBAT0U 536
289 #define DBAT0L 537
290 #define DBAT1U 538
291 #define DBAT1L 538
292 #define DBAT2U 540
293 #define DBAT2L 541
294 #define DBAT3U 542
295 #define DBAT3L 543
296 #define DBAT4U 568
297 #define DBAT4L 569
298 #define DBAT5U 570
299 #define DBAT5L 571
300 #define DBAT6U 572
301 #define DBAT6L 573
302 #define DBAT7U 574
303 #define DBAT7L 575
305 #define HID0 1008
306 #define HID1 1009
307 #define HID2 920
308 #define HID4 1011
310 #define GQR0 912
311 #define GQR1 913
312 #define GQR2 914
313 #define GQR3 915
314 #define GQR4 916
315 #define GQR5 917
316 #define GQR6 918
317 #define GQR7 919
319 #define L2CR 1017
321 #define WPAR 921
323 #define DMAU 922
324 #define DMAL 923
326 #define MSR_RI 0x00000002
327 #define MSR_DR 0x00000010
328 #define MSR_IR 0x00000020
329 #define MSR_IP 0x00000040
330 #define MSR_SE 0x00000400
331 #define MSR_ME 0x00001000
332 #define MSR_FP 0x00002000
333 #define MSR_POW 0x00004000
334 #define MSR_EE 0x00008000
336 #define PPC_ALIGNMENT 8
338 #define PPC_CACHE_ALIGNMENT 32
340 #endif //__ASM_H__