| commit | afa05235a5860e7e2153b428294bd44569d4039b | |
| author | Aurelien Jarno <aurelien@aurel32.net> | |
| Sat, 17 Oct 2009 12:17:47 +0000 (17 14:17 +0200) | ||
| committer | Aurelien Jarno <aurelien@aurel32.net> | |
| Tue, 1 Dec 2009 00:06:15 +0000 (1 00:06 +0000) | ||
| tree | c14d786d67390068c87e82ddf3e82a821f05579b | treesnapshot (tar.gz zip) |
| parent | e7139c440c489ed31bb81ccb5e456ae9d8fe1c1e | commitdiff |
tcg: initial mips support
Based on a patch from Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
A few words about design choices:
* Two registers, at and t0, are reserved for TCG internal use. They are
useful for bswap and 64-bit ops.
* Most ops supports a constant argument with value 0, which is actually
mapped to the zero register.
* While the at register is available for constant loading, ops only
support a limited range of constants. TCG does a better job doing the
register allocation and constant loading by itself. There are plenty of
registers available anyway.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Based on a patch from Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
A few words about design choices:
* Two registers, at and t0, are reserved for TCG internal use. They are
useful for bswap and 64-bit ops.
* Most ops supports a constant argument with value 0, which is actually
mapped to the zero register.
* While the at register is available for constant loading, ops only
support a limited range of constants. TCG does a better job doing the
register allocation and constant loading by itself. There are plenty of
registers available anyway.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| configure | diffblobblamehistory | |
| tcg/mips/tcg-target.c | [new file with mode: 0644] | blob |
| tcg/mips/tcg-target.h | [new file with mode: 0644] | blob |