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hw/intc/loongarch_ipi: Fix ipi device access of 64bits
2022-07-05 Xiaojuan Yanghw/intc/loongarch_ipi: Fix ipi device access of 64bits
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220705064901.2353349-2-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yangtarget/loongarch: Add lock when writing timer clear reg
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220701093407.2150607-10-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yangtarget/loongarch: Fix the meaning of ECFG reg's VS...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-9-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yanghw/rtc/ls7a_rtc: Fix 'calculate' spelling errors
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-8-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yanghw/rtc/ls7a_rtc: Use tm struct pointer as arguments...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-7-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yanghw/rtc/ls7a_rtc: Fix rtc enable and disable function
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-6-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yanghw/rtc/ls7a_rtc: Add reset function
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-5-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yanghw/rtc/ls7a_rtc: Remove unimplemented device in realized...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-4-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yanghw/rtc/ls7a_rtc: Fix timer call back function
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-3-yangxiaojuan@loongson.cn>
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2022-07-04 Xiaojuan Yanghw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
...Id: <20220701093407.2150607-2-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtests/tcg/loongarch64: Add hello/memory test in loongarch64...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-43-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add gdb support.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-42-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/loongarch: Add LoongArch virt power manager support.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-41-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/loongarch: Add LoongArch load elf function.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-40-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/loongarch: Add LoongArch ls7a rtc device support
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-39-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/loongarch: Add some devices support for 3A5000.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-38-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan YangEnable common virtio pci support for LoongArch
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-37-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/loongarch: Add irq hierarchy for the system
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-36-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/intc: Add LoongArch extioi interrupt controller...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-35-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/intc: Add LoongArch ls7a msi interrupt controller...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-34-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/intc: Add LoongArch ls7a interrupt controller support...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-33-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/loongarch: Add LoongArch ipi interrupt support(IPI)
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-32-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yanghw/loongarch: Add support loongson3 virt machine type.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-31-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add timer related instructions support.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-30-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add other core instructions support
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-29-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add TLB instruction support
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-28-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add LoongArch IOCSR instruction
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-27-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add LoongArch CSR instruction
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-26-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add constant timer support
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-25-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add LoongArch interrupt and exception...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-24-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add MMU support for LoongArch CPU.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-23-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Implement qmp_query_cpu_definitions()
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-22-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add basic vmstate description of...
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-21-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add CSRs definition
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-20-yangxiaojuan@loongson.cn>
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2022-06-06 Xiaojuan Yangtarget/loongarch: Add system emulation introduction
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
... <20220606124333.2060567-19-yangxiaojuan@loongson.cn>
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