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accel/tcg: Remove pointless CPUArchState casts
2022-03-06 Philippe Mathieu... accel/tcg: Remove pointless CPUArchState casts
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target/i386: Remove pointless CPUArchState casts
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target: Use ArchCPU as interface to target CPU
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-15-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target: Introduce and use OBJECT_DECLARE_CPU_TYPE(...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-14-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target: Use CPUArchState as interface to target-specific...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-13-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target: Use forward declared type instead of structure...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-12-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target/hexagon: Add missing 'hw/core/cpu.h' include
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-11-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target: Include missing 'cpu.h'
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-10-f4bug@amsat.org>
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2022-03-06 Taylor SimpsonHexagon (target/hexagon) convert to OBJECT_DECLARE_TYPE
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... target/i386/tcg/sysemu: Include missing 'exec/exec...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-8-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... cpu: Add missing 'exec/exec-all.h' and 'qemu/accel...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-6-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... exec/cpu_ldst: Include 'cpu.h' to get target_ulong...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-5-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... meson: Display libfdt as disabled when system emulation...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-2-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... softmmu: Build target-agnostic objects once
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-22-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... softmmu: Add qemu_init_arch_modules()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-21-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... exec/cpu: Make address_space_init/reloading_memory_map...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-20-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... exec/gdbstub: Make gdb_exit() / gdb_set_stop_cpu()...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-19-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... misc: Add missing "sysemu/cpu-timers.h" include
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-18-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... misc: Remove unnecessary "sysemu/cpu-timers.h" include
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-17-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... softmmu/cpu-timers: Remove unused 'exec/exec-all.h...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-16-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... softmmu/physmem: Remove unnecessary include
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-14-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... softmmu/globals: Remove unused 'hw/i386/*' headers
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-13-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... accel: Introduce AccelOpsClass::cpus_are_resettable()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-12-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... accel: Introduce AccelOpsClass::cpu_thread_is_idle()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-11-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... softmmu/cpus: Code movement
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-10-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... accel/hax: Introduce CONFIG_HAX_IS_POSSIBLE
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-9-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... accel/kvm: Simplify user-mode #ifdef'ry
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-8-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... sysemu/kvm: Make kvm_on_sigbus() / kvm_on_sigbus_vcpu...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-7-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... sysemu/memory_mapping: Become target-agnostic
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-6-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... exec: Make cpu_memory_rw_debug() target agnostic
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-5-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... exec: Declare vaddr as a generic target-agnostic type
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-4-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... accel/meson: Only build hw virtualization with system...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-3-f4bug@amsat.org>
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2022-03-06 Philippe Mathieu... accel: Restrict sysemu stubs to system emulation
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-2-f4bug@amsat.org>
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2022-01-18 Alex Bennéedocs/devel: add some clarifying text for aliases
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/dma: Let dma_buf_read() / dma_buf_write() propagate...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220117125130.131828-1-f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/dma: Use dma_addr_t type definition when relevant
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220111184309.28637-11-f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/dma: Move ScatterGatherEntry / QEMUSGList declarations...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220111184309.28637-10-f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/dma: Fix format string issues using dma_addr_t
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220111184309.28637-10-f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/scsi: Rename SCSIRequest::resid as 'residual'
Message-Id: <20220111184309.28637-8-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/rdma/rdma_utils: Rename rdma_pci_dma_map 'len' argument
Message-Id: <20220111184309.28637-7-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/dma: Remove CONFIG_USER_ONLY check
Message-Id: <20220111184309.28637-6-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/pci: Document pci_dma_map()
Message-Id: <20220111184309.28637-5-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/pci: Restrict pci-bus stub to sysemu
Message-Id: <20220111184309.28637-4-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... hw/nvram: Restrict fw_cfg QOM interface to sysemu and...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220111184309.28637-3-f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... stubs: Restrict fw_cfg to system emulation
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220111184309.28637-2-f4bug@amsat.org>
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2022-01-18 Peter Xumemory: Fix incorrect calls of log_global_start/stop
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 David Hildenbrandmemory: Update description of memory_region_is_mapped()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 David Hildenbrandmemory: Make memory_region_is_mapped() succeed when...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 David Hildenbrandmachine: Use host_memory_backend_is_mapped() in machine_cons...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... memory: Have 'info mtree' remove duplicated Address...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... memory: Split mtree_info() as mtree_info_flatview(...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-18 Philippe Mathieu... memory: Directly dispatch alias accesses on origin...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210418055708.820980-1-f4bug@amsat.org>
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2022-01-04 Frank Changhw/sd: Add SDHC support for SD card SPI-mode
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2022-01-04 Philippe Mathieu... hw/sd/sdcard: Rename Write Protect Group variables
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210728181728.2012952-4-f4bug@amsat.org>
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2021-12-06 Alex BennéeRevert "vga: don't abort when adding a duplicate isa...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-12-06 Jiaxun Yanghw/mips/boston: Fix load_elf() error detection
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-12-06 Jiaxun Yanghw/mips/bootloader: Fix write_ulong()
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... Revert "elf: Relax MIPS' elf_check_arch() to accept...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211101114800.2692157-1-f4bug@amsat.org>
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2021-11-02 BALATON Zoltanhw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-11-02 BALATON Zoltanusb/uhci: Replace pci_set_irq with qemu_set_irq
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-11-02 BALATON Zoltanusb/uhci: Disallow user creating a vt82c686-uhci-pci...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-11-02 BALATON Zoltanusb/uhci: Misc clean up
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Remove obsolete FCR0_HAS2008 comment on...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028212103.2126176-1-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Fix Loongson-3A4000 MSAIR config register
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211026180920.1085516-1-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Remove one MSA unnecessary decodetree...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-32-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Remove generic MSA opcode
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-31-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert CTCMSA opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-30-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert CFCMSA opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-29-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA MOVE.V opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-28-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA COPY_S and INSERT opcodes...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-27-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA COPY_U opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-26-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA ELM instruction format to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-25-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 3R instruction format to decodetree...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-24-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 3R instruction format to decodetree...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-23-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 3R instruction format to decodetree...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-22-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 3R instruction format to decodetree...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-21-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 3RF instruction format to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-20-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 3RF instruction format to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-19-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA VEC instruction format to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-18-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 2R instruction format to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-17-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA FILL opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-16-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA 2RF instruction format to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-15-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA load/store instruction format...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-14-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA I8 instruction format to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-13-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA SHF opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-12-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA BIT instruction format to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-11-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA I5 instruction format to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-10-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Convert MSA LDI opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-9-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-8-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Use enum definitions from CPUMIPSMSADataFormat...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-7-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Have check_msa_access() return a boolean
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-6-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Use dup_const() to simplify
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-5-f4bug@amsat.org>
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2021-11-02 Philippe Mathieu... target/mips: Adjust style in msa_translate_init()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211023214803.522078-34-f4bug@amsat.org>
 commit | commitdiff | tree
2021-11-02 Philippe Mathieu... target/mips: Fix MSA MSUBV.B opcode
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-3-f4bug@amsat.org>
 commit | commitdiff | tree
2021-11-02 Philippe Mathieu... target/mips: Fix MSA MADDV.B opcode
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211028210843.2120802-2-f4bug@amsat.org>
 commit | commitdiff | tree
2021-11-02 Philippe Mathieu... MAINTAINERS: Split MIPS TCG frontend vs MIPS machines...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211004092515.3819836-4-f4bug@amsat.org>
 commit | commitdiff | tree
2021-11-02 Philippe Mathieu... MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211027041416.1237433-3-f4bug@amsat.org>
 commit | commitdiff | tree
2021-11-02 Philippe Mathieu... MAINTAINERS: Add MIPS general architecture support...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20211004092515.3819836-2-f4bug@amsat.org>
 commit | commitdiff | tree
2021-10-30 BALATON Zoltanhw/timer/sh_timer: Remove use of hw_error
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 commit | commitdiff | tree
2021-10-30 BALATON Zoltanhw/timer/sh_timer: Fix timer memory region size
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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