From bd591dc1b3c39b7f73b8d9f20be6e9001c905238 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sat, 21 Jan 2023 21:35:29 +0100 Subject: [PATCH] hw/display/sm501: Code style fix MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Fix checkpatch warning about multi-line comment. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé Message-Id: <8801292992a304609e1eac680fe36b515592b926.1674333199.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza --- hw/display/sm501.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 1e17072452..e1d0591d36 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1768,7 +1768,8 @@ static const GraphicHwOps sm501_ops = { static void sm501_reset(SM501State *s) { s->system_control = 0x00100000; /* 2D engine FIFO empty */ - /* Bits 17 (SH), 7 (CDR), 6:5 (Test), 2:0 (Bus) are all supposed + /* + * Bits 17 (SH), 7 (CDR), 6:5 (Test), 2:0 (Bus) are all supposed * to be determined at reset by GPIO lines which set config bits. * We hardwire them: * SH = 0 : Hitachi Ready Polarity == Active Low -- 2.11.4.GIT