target/arm: Enable SCR and HCR bits for RAS
commitda3d8b13624246702f7b8b88e37ee525a2f39ad2
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 6 May 2022 18:02:32 +0000 (6 13:02 -0500)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 9 May 2022 10:47:54 +0000 (9 11:47 +0100)
treeb73b1e9864b7a6ad035b94ae4b77d971cf31b580
parent58e93b48aa1b9f0e6de7e57f6f68b6dda7a8198a
target/arm: Enable SCR and HCR bits for RAS

Enable writes to the TERR and TEA bits when RAS is enabled.
These bits are otherwise RES0.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/helper.c