target-ppc: add maddhd and maddhdu instruction
commit5f29cc829225f777ca4697cb955572feebaf0748
authorNikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Tue, 26 Jul 2016 11:58:37 +0000 (26 17:28 +0530)
committerDavid Gibson <david@gibson.dropbear.id.au>
Tue, 6 Sep 2016 23:52:14 +0000 (7 09:52 +1000)
tree187fa459d1c303ffb7c8452f98bd66a3f7ac6f6b
parentaeeb044c7bd59ced2b630bf82f644a2137ac9a6f
target-ppc: add maddhd and maddhdu instruction

maddhd: Multiply-Add High Doubleword
maddhdu: Multiply-Add High Doubleword Unsigned

Above two instruction are dual form and differ by 1 bit
(31st bit)

Multiplies two 64-bit registers (RA * RB), adds third register(RC) to
the result(quadword) and returns the higher dword in the target
register(RT).

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
target-ppc/translate.c