| commit | 2151b044fdca74a4fe7148f302ba9d6191516744 | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Fri, 15 Jun 2018 13:57:15 +0000 (15 14:57 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 15 Jun 2018 14:23:34 +0000 (15 15:23 +0100) | ||
| tree | 8164c128ed43d434f7b56264f6cb9852ee6f9fe6 | treesnapshot (tar.gz zip) |
| parent | acd9575e59da1bfc21a1feccb00c5dddd45328f7 | commitdiff |
m25p80: add support for two bytes WRSR for Macronix chips
On Macronix chips, two bytes can written to the WRSR. First byte will
configure the status register and the second the configuration
register. It is important to save the configuration value as it
contains the dummy cycle setting when using dual or quad IO mode.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
On Macronix chips, two bytes can written to the WRSR. First byte will
configure the status register and the second the configuration
register. It is important to save the configuration value as it
contains the dummy cycle setting when using dual or quad IO mode.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/block/m25p80.c | diffblobblamehistory |