2 * QEMU MC146818 RTC emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/timer.h"
26 #include "sysemu/sysemu.h"
27 #include "hw/timer/mc146818rtc.h"
28 #include "qapi/visitor.h"
31 #include "hw/i386/apic.h"
35 //#define DEBUG_COALESCED
38 # define CMOS_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
40 # define CMOS_DPRINTF(format, ...) do { } while (0)
43 #ifdef DEBUG_COALESCED
44 # define DPRINTF_C(format, ...) printf(format, ## __VA_ARGS__)
46 # define DPRINTF_C(format, ...) do { } while (0)
49 #define NSEC_PER_SEC 1000000000LL
50 #define SEC_PER_MIN 60
51 #define MIN_PER_HOUR 60
52 #define SEC_PER_HOUR 3600
53 #define HOUR_PER_DAY 24
54 #define SEC_PER_DAY 86400
56 #define RTC_REINJECT_ON_ACK_COUNT 20
57 #define RTC_CLOCK_RATE 32768
58 #define UIP_HOLD_LENGTH (8 * NSEC_PER_SEC / 32768)
60 #define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC)
62 typedef struct RTCState
{
66 uint8_t cmos_data
[128];
75 QEMUTimer
*periodic_timer
;
76 int64_t next_periodic_time
;
77 /* update-ended timer */
78 QEMUTimer
*update_timer
;
79 uint64_t next_alarm_time
;
80 uint16_t irq_reinject_on_ack_count
;
81 uint32_t irq_coalesced
;
83 QEMUTimer
*coalesced_timer
;
84 Notifier clock_reset_notifier
;
85 LostTickPolicy lost_tick_policy
;
86 Notifier suspend_notifier
;
89 static void rtc_set_time(RTCState
*s
);
90 static void rtc_update_time(RTCState
*s
);
91 static void rtc_set_cmos(RTCState
*s
, const struct tm
*tm
);
92 static inline int rtc_from_bcd(RTCState
*s
, int a
);
93 static uint64_t get_next_alarm(RTCState
*s
);
95 static inline bool rtc_running(RTCState
*s
)
97 return (!(s
->cmos_data
[RTC_REG_B
] & REG_B_SET
) &&
98 (s
->cmos_data
[RTC_REG_A
] & 0x70) <= 0x20);
101 static uint64_t get_guest_rtc_ns(RTCState
*s
)
104 uint64_t guest_clock
= qemu_clock_get_ns(rtc_clock
);
106 guest_rtc
= s
->base_rtc
* NSEC_PER_SEC
107 + guest_clock
- s
->last_update
+ s
->offset
;
112 static void rtc_coalesced_timer_update(RTCState
*s
)
114 if (s
->irq_coalesced
== 0) {
115 timer_del(s
->coalesced_timer
);
117 /* divide each RTC interval to 2 - 8 smaller intervals */
118 int c
= MIN(s
->irq_coalesced
, 7) + 1;
119 int64_t next_clock
= qemu_clock_get_ns(rtc_clock
) +
120 muldiv64(s
->period
/ c
, get_ticks_per_sec(), RTC_CLOCK_RATE
);
121 timer_mod(s
->coalesced_timer
, next_clock
);
125 static void rtc_coalesced_timer(void *opaque
)
127 RTCState
*s
= opaque
;
129 if (s
->irq_coalesced
!= 0) {
130 apic_reset_irq_delivered();
131 s
->cmos_data
[RTC_REG_C
] |= 0xc0;
132 DPRINTF_C("cmos: injecting from timer\n");
133 qemu_irq_raise(s
->irq
);
134 if (apic_get_irq_delivered()) {
136 DPRINTF_C("cmos: coalesced irqs decreased to %d\n",
141 rtc_coalesced_timer_update(s
);
145 /* handle periodic timer */
146 static void periodic_timer_update(RTCState
*s
, int64_t current_time
)
148 int period_code
, period
;
149 int64_t cur_clock
, next_irq_clock
;
151 period_code
= s
->cmos_data
[RTC_REG_A
] & 0x0f;
153 && (s
->cmos_data
[RTC_REG_B
] & REG_B_PIE
)) {
154 if (period_code
<= 2)
156 /* period in 32 Khz cycles */
157 period
= 1 << (period_code
- 1);
159 if (period
!= s
->period
) {
160 s
->irq_coalesced
= (s
->irq_coalesced
* s
->period
) / period
;
161 DPRINTF_C("cmos: coalesced irqs scaled to %d\n", s
->irq_coalesced
);
165 /* compute 32 khz clock */
166 cur_clock
= muldiv64(current_time
, RTC_CLOCK_RATE
, get_ticks_per_sec());
167 next_irq_clock
= (cur_clock
& ~(period
- 1)) + period
;
168 s
->next_periodic_time
=
169 muldiv64(next_irq_clock
, get_ticks_per_sec(), RTC_CLOCK_RATE
) + 1;
170 timer_mod(s
->periodic_timer
, s
->next_periodic_time
);
173 s
->irq_coalesced
= 0;
175 timer_del(s
->periodic_timer
);
179 static void rtc_periodic_timer(void *opaque
)
181 RTCState
*s
= opaque
;
183 periodic_timer_update(s
, s
->next_periodic_time
);
184 s
->cmos_data
[RTC_REG_C
] |= REG_C_PF
;
185 if (s
->cmos_data
[RTC_REG_B
] & REG_B_PIE
) {
186 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
;
188 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
189 if (s
->irq_reinject_on_ack_count
>= RTC_REINJECT_ON_ACK_COUNT
)
190 s
->irq_reinject_on_ack_count
= 0;
191 apic_reset_irq_delivered();
192 qemu_irq_raise(s
->irq
);
193 if (!apic_get_irq_delivered()) {
195 rtc_coalesced_timer_update(s
);
196 DPRINTF_C("cmos: coalesced irqs increased to %d\n",
201 qemu_irq_raise(s
->irq
);
205 /* handle update-ended timer */
206 static void check_update_timer(RTCState
*s
)
208 uint64_t next_update_time
;
212 /* From the data sheet: "Holding the dividers in reset prevents
213 * interrupts from operating, while setting the SET bit allows"
214 * them to occur. However, it will prevent an alarm interrupt
215 * from occurring, because the time of day is not updated.
217 if ((s
->cmos_data
[RTC_REG_A
] & 0x60) == 0x60) {
218 timer_del(s
->update_timer
);
221 if ((s
->cmos_data
[RTC_REG_C
] & REG_C_UF
) &&
222 (s
->cmos_data
[RTC_REG_B
] & REG_B_SET
)) {
223 timer_del(s
->update_timer
);
226 if ((s
->cmos_data
[RTC_REG_C
] & REG_C_UF
) &&
227 (s
->cmos_data
[RTC_REG_C
] & REG_C_AF
)) {
228 timer_del(s
->update_timer
);
232 guest_nsec
= get_guest_rtc_ns(s
) % NSEC_PER_SEC
;
233 /* if UF is clear, reprogram to next second */
234 next_update_time
= qemu_clock_get_ns(rtc_clock
)
235 + NSEC_PER_SEC
- guest_nsec
;
237 /* Compute time of next alarm. One second is already accounted
238 * for in next_update_time.
240 next_alarm_sec
= get_next_alarm(s
);
241 s
->next_alarm_time
= next_update_time
+ (next_alarm_sec
- 1) * NSEC_PER_SEC
;
243 if (s
->cmos_data
[RTC_REG_C
] & REG_C_UF
) {
244 /* UF is set, but AF is clear. Program the timer to target
246 next_update_time
= s
->next_alarm_time
;
248 if (next_update_time
!= timer_expire_time_ns(s
->update_timer
)) {
249 timer_mod(s
->update_timer
, next_update_time
);
253 static inline uint8_t convert_hour(RTCState
*s
, uint8_t hour
)
255 if (!(s
->cmos_data
[RTC_REG_B
] & REG_B_24H
)) {
257 if (s
->cmos_data
[RTC_HOURS
] & 0x80) {
264 static uint64_t get_next_alarm(RTCState
*s
)
266 int32_t alarm_sec
, alarm_min
, alarm_hour
, cur_hour
, cur_min
, cur_sec
;
267 int32_t hour
, min
, sec
;
271 alarm_sec
= rtc_from_bcd(s
, s
->cmos_data
[RTC_SECONDS_ALARM
]);
272 alarm_min
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MINUTES_ALARM
]);
273 alarm_hour
= rtc_from_bcd(s
, s
->cmos_data
[RTC_HOURS_ALARM
]);
274 alarm_hour
= alarm_hour
== -1 ? -1 : convert_hour(s
, alarm_hour
);
276 cur_sec
= rtc_from_bcd(s
, s
->cmos_data
[RTC_SECONDS
]);
277 cur_min
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MINUTES
]);
278 cur_hour
= rtc_from_bcd(s
, s
->cmos_data
[RTC_HOURS
]);
279 cur_hour
= convert_hour(s
, cur_hour
);
281 if (alarm_hour
== -1) {
282 alarm_hour
= cur_hour
;
283 if (alarm_min
== -1) {
285 if (alarm_sec
== -1) {
286 alarm_sec
= cur_sec
+ 1;
287 } else if (cur_sec
> alarm_sec
) {
290 } else if (cur_min
== alarm_min
) {
291 if (alarm_sec
== -1) {
292 alarm_sec
= cur_sec
+ 1;
294 if (cur_sec
> alarm_sec
) {
298 if (alarm_sec
== SEC_PER_MIN
) {
299 /* wrap to next hour, minutes is not in don't care mode */
303 } else if (cur_min
> alarm_min
) {
306 } else if (cur_hour
== alarm_hour
) {
307 if (alarm_min
== -1) {
309 if (alarm_sec
== -1) {
310 alarm_sec
= cur_sec
+ 1;
311 } else if (cur_sec
> alarm_sec
) {
315 if (alarm_sec
== SEC_PER_MIN
) {
319 /* wrap to next day, hour is not in don't care mode */
320 alarm_min
%= MIN_PER_HOUR
;
321 } else if (cur_min
== alarm_min
) {
322 if (alarm_sec
== -1) {
323 alarm_sec
= cur_sec
+ 1;
325 /* wrap to next day, hours+minutes not in don't care mode */
326 alarm_sec
%= SEC_PER_MIN
;
330 /* values that are still don't care fire at the next min/sec */
331 if (alarm_min
== -1) {
334 if (alarm_sec
== -1) {
338 /* keep values in range */
339 if (alarm_sec
== SEC_PER_MIN
) {
343 if (alarm_min
== MIN_PER_HOUR
) {
347 alarm_hour
%= HOUR_PER_DAY
;
349 hour
= alarm_hour
- cur_hour
;
350 min
= hour
* MIN_PER_HOUR
+ alarm_min
- cur_min
;
351 sec
= min
* SEC_PER_MIN
+ alarm_sec
- cur_sec
;
352 return sec
<= 0 ? sec
+ SEC_PER_DAY
: sec
;
355 static void rtc_update_timer(void *opaque
)
357 RTCState
*s
= opaque
;
358 int32_t irqs
= REG_C_UF
;
361 assert((s
->cmos_data
[RTC_REG_A
] & 0x60) != 0x60);
363 /* UIP might have been latched, update time and clear it. */
365 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
367 if (qemu_clock_get_ns(rtc_clock
) >= s
->next_alarm_time
) {
369 if (s
->cmos_data
[RTC_REG_B
] & REG_B_AIE
) {
370 qemu_system_wakeup_request(QEMU_WAKEUP_REASON_RTC
);
374 new_irqs
= irqs
& ~s
->cmos_data
[RTC_REG_C
];
375 s
->cmos_data
[RTC_REG_C
] |= irqs
;
376 if ((new_irqs
& s
->cmos_data
[RTC_REG_B
]) != 0) {
377 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
;
378 qemu_irq_raise(s
->irq
);
380 check_update_timer(s
);
383 static void cmos_ioport_write(void *opaque
, hwaddr addr
,
384 uint64_t data
, unsigned size
)
386 RTCState
*s
= opaque
;
388 if ((addr
& 1) == 0) {
389 s
->cmos_index
= data
& 0x7f;
391 CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02x\n",
392 s
->cmos_index
, data
);
393 switch(s
->cmos_index
) {
394 case RTC_SECONDS_ALARM
:
395 case RTC_MINUTES_ALARM
:
396 case RTC_HOURS_ALARM
:
397 s
->cmos_data
[s
->cmos_index
] = data
;
398 check_update_timer(s
);
400 case RTC_IBM_PS2_CENTURY_BYTE
:
401 s
->cmos_index
= RTC_CENTURY
;
407 case RTC_DAY_OF_WEEK
:
408 case RTC_DAY_OF_MONTH
:
411 s
->cmos_data
[s
->cmos_index
] = data
;
412 /* if in set mode, do not update the time */
413 if (rtc_running(s
)) {
415 check_update_timer(s
);
419 if ((data
& 0x60) == 0x60) {
420 if (rtc_running(s
)) {
423 /* What happens to UIP when divider reset is enabled is
424 * unclear from the datasheet. Shouldn't matter much
427 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
428 } else if (((s
->cmos_data
[RTC_REG_A
] & 0x60) == 0x60) &&
429 (data
& 0x70) <= 0x20) {
430 /* when the divider reset is removed, the first update cycle
431 * begins one-half second later*/
432 if (!(s
->cmos_data
[RTC_REG_B
] & REG_B_SET
)) {
433 s
->offset
= 500000000;
436 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
438 /* UIP bit is read only */
439 s
->cmos_data
[RTC_REG_A
] = (data
& ~REG_A_UIP
) |
440 (s
->cmos_data
[RTC_REG_A
] & REG_A_UIP
);
441 periodic_timer_update(s
, qemu_clock_get_ns(rtc_clock
));
442 check_update_timer(s
);
445 if (data
& REG_B_SET
) {
446 /* update cmos to when the rtc was stopping */
447 if (rtc_running(s
)) {
450 /* set mode: reset UIP mode */
451 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
454 /* if disabling set mode, update the time */
455 if ((s
->cmos_data
[RTC_REG_B
] & REG_B_SET
) &&
456 (s
->cmos_data
[RTC_REG_A
] & 0x70) <= 0x20) {
457 s
->offset
= get_guest_rtc_ns(s
) % NSEC_PER_SEC
;
461 /* if an interrupt flag is already set when the interrupt
462 * becomes enabled, raise an interrupt immediately. */
463 if (data
& s
->cmos_data
[RTC_REG_C
] & REG_C_MASK
) {
464 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
;
465 qemu_irq_raise(s
->irq
);
467 s
->cmos_data
[RTC_REG_C
] &= ~REG_C_IRQF
;
468 qemu_irq_lower(s
->irq
);
470 s
->cmos_data
[RTC_REG_B
] = data
;
471 periodic_timer_update(s
, qemu_clock_get_ns(rtc_clock
));
472 check_update_timer(s
);
476 /* cannot write to them */
479 s
->cmos_data
[s
->cmos_index
] = data
;
485 static inline int rtc_to_bcd(RTCState
*s
, int a
)
487 if (s
->cmos_data
[RTC_REG_B
] & REG_B_DM
) {
490 return ((a
/ 10) << 4) | (a
% 10);
494 static inline int rtc_from_bcd(RTCState
*s
, int a
)
496 if ((a
& 0xc0) == 0xc0) {
499 if (s
->cmos_data
[RTC_REG_B
] & REG_B_DM
) {
502 return ((a
>> 4) * 10) + (a
& 0x0f);
506 static void rtc_get_time(RTCState
*s
, struct tm
*tm
)
508 tm
->tm_sec
= rtc_from_bcd(s
, s
->cmos_data
[RTC_SECONDS
]);
509 tm
->tm_min
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MINUTES
]);
510 tm
->tm_hour
= rtc_from_bcd(s
, s
->cmos_data
[RTC_HOURS
] & 0x7f);
511 if (!(s
->cmos_data
[RTC_REG_B
] & REG_B_24H
)) {
513 if (s
->cmos_data
[RTC_HOURS
] & 0x80) {
517 tm
->tm_wday
= rtc_from_bcd(s
, s
->cmos_data
[RTC_DAY_OF_WEEK
]) - 1;
518 tm
->tm_mday
= rtc_from_bcd(s
, s
->cmos_data
[RTC_DAY_OF_MONTH
]);
519 tm
->tm_mon
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MONTH
]) - 1;
521 rtc_from_bcd(s
, s
->cmos_data
[RTC_YEAR
]) + s
->base_year
+
522 rtc_from_bcd(s
, s
->cmos_data
[RTC_CENTURY
]) * 100 - 1900;
525 static void rtc_set_time(RTCState
*s
)
529 rtc_get_time(s
, &tm
);
530 s
->base_rtc
= mktimegm(&tm
);
531 s
->last_update
= qemu_clock_get_ns(rtc_clock
);
533 rtc_change_mon_event(&tm
);
536 static void rtc_set_cmos(RTCState
*s
, const struct tm
*tm
)
540 s
->cmos_data
[RTC_SECONDS
] = rtc_to_bcd(s
, tm
->tm_sec
);
541 s
->cmos_data
[RTC_MINUTES
] = rtc_to_bcd(s
, tm
->tm_min
);
542 if (s
->cmos_data
[RTC_REG_B
] & REG_B_24H
) {
544 s
->cmos_data
[RTC_HOURS
] = rtc_to_bcd(s
, tm
->tm_hour
);
547 int h
= (tm
->tm_hour
% 12) ? tm
->tm_hour
% 12 : 12;
548 s
->cmos_data
[RTC_HOURS
] = rtc_to_bcd(s
, h
);
549 if (tm
->tm_hour
>= 12)
550 s
->cmos_data
[RTC_HOURS
] |= 0x80;
552 s
->cmos_data
[RTC_DAY_OF_WEEK
] = rtc_to_bcd(s
, tm
->tm_wday
+ 1);
553 s
->cmos_data
[RTC_DAY_OF_MONTH
] = rtc_to_bcd(s
, tm
->tm_mday
);
554 s
->cmos_data
[RTC_MONTH
] = rtc_to_bcd(s
, tm
->tm_mon
+ 1);
555 year
= tm
->tm_year
+ 1900 - s
->base_year
;
556 s
->cmos_data
[RTC_YEAR
] = rtc_to_bcd(s
, year
% 100);
557 s
->cmos_data
[RTC_CENTURY
] = rtc_to_bcd(s
, year
/ 100);
560 static void rtc_update_time(RTCState
*s
)
566 guest_nsec
= get_guest_rtc_ns(s
);
567 guest_sec
= guest_nsec
/ NSEC_PER_SEC
;
568 gmtime_r(&guest_sec
, &ret
);
570 /* Is SET flag of Register B disabled? */
571 if ((s
->cmos_data
[RTC_REG_B
] & REG_B_SET
) == 0) {
572 rtc_set_cmos(s
, &ret
);
576 static int update_in_progress(RTCState
*s
)
580 if (!rtc_running(s
)) {
583 if (timer_pending(s
->update_timer
)) {
584 int64_t next_update_time
= timer_expire_time_ns(s
->update_timer
);
585 /* Latch UIP until the timer expires. */
586 if (qemu_clock_get_ns(rtc_clock
) >=
587 (next_update_time
- UIP_HOLD_LENGTH
)) {
588 s
->cmos_data
[RTC_REG_A
] |= REG_A_UIP
;
593 guest_nsec
= get_guest_rtc_ns(s
);
594 /* UIP bit will be set at last 244us of every second. */
595 if ((guest_nsec
% NSEC_PER_SEC
) >= (NSEC_PER_SEC
- UIP_HOLD_LENGTH
)) {
601 static uint64_t cmos_ioport_read(void *opaque
, hwaddr addr
,
604 RTCState
*s
= opaque
;
606 if ((addr
& 1) == 0) {
609 switch(s
->cmos_index
) {
610 case RTC_IBM_PS2_CENTURY_BYTE
:
611 s
->cmos_index
= RTC_CENTURY
;
617 case RTC_DAY_OF_WEEK
:
618 case RTC_DAY_OF_MONTH
:
621 /* if not in set mode, calibrate cmos before
623 if (rtc_running(s
)) {
626 ret
= s
->cmos_data
[s
->cmos_index
];
629 if (update_in_progress(s
)) {
630 s
->cmos_data
[s
->cmos_index
] |= REG_A_UIP
;
632 s
->cmos_data
[s
->cmos_index
] &= ~REG_A_UIP
;
634 ret
= s
->cmos_data
[s
->cmos_index
];
637 ret
= s
->cmos_data
[s
->cmos_index
];
638 qemu_irq_lower(s
->irq
);
639 s
->cmos_data
[RTC_REG_C
] = 0x00;
640 if (ret
& (REG_C_UF
| REG_C_AF
)) {
641 check_update_timer(s
);
644 if(s
->irq_coalesced
&&
645 (s
->cmos_data
[RTC_REG_B
] & REG_B_PIE
) &&
646 s
->irq_reinject_on_ack_count
< RTC_REINJECT_ON_ACK_COUNT
) {
647 s
->irq_reinject_on_ack_count
++;
648 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
| REG_C_PF
;
649 apic_reset_irq_delivered();
650 DPRINTF_C("cmos: injecting on ack\n");
651 qemu_irq_raise(s
->irq
);
652 if (apic_get_irq_delivered()) {
654 DPRINTF_C("cmos: coalesced irqs decreased to %d\n",
661 ret
= s
->cmos_data
[s
->cmos_index
];
664 CMOS_DPRINTF("cmos: read index=0x%02x val=0x%02x\n",
670 void rtc_set_memory(ISADevice
*dev
, int addr
, int val
)
672 RTCState
*s
= MC146818_RTC(dev
);
673 if (addr
>= 0 && addr
<= 127)
674 s
->cmos_data
[addr
] = val
;
677 int rtc_get_memory(ISADevice
*dev
, int addr
)
679 RTCState
*s
= MC146818_RTC(dev
);
680 assert(addr
>= 0 && addr
<= 127);
681 return s
->cmos_data
[addr
];
684 static void rtc_set_date_from_host(ISADevice
*dev
)
686 RTCState
*s
= MC146818_RTC(dev
);
689 qemu_get_timedate(&tm
, 0);
691 s
->base_rtc
= mktimegm(&tm
);
692 s
->last_update
= qemu_clock_get_ns(rtc_clock
);
695 /* set the CMOS date */
696 rtc_set_cmos(s
, &tm
);
699 static int rtc_post_load(void *opaque
, int version_id
)
701 RTCState
*s
= opaque
;
703 if (version_id
<= 2) {
706 check_update_timer(s
);
710 if (version_id
>= 2) {
711 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
712 rtc_coalesced_timer_update(s
);
719 static const VMStateDescription vmstate_rtc
= {
720 .name
= "mc146818rtc",
722 .minimum_version_id
= 1,
723 .minimum_version_id_old
= 1,
724 .post_load
= rtc_post_load
,
725 .fields
= (VMStateField
[]) {
726 VMSTATE_BUFFER(cmos_data
, RTCState
),
727 VMSTATE_UINT8(cmos_index
, RTCState
),
729 VMSTATE_TIMER(periodic_timer
, RTCState
),
730 VMSTATE_INT64(next_periodic_time
, RTCState
),
732 VMSTATE_UINT32_V(irq_coalesced
, RTCState
, 2),
733 VMSTATE_UINT32_V(period
, RTCState
, 2),
734 VMSTATE_UINT64_V(base_rtc
, RTCState
, 3),
735 VMSTATE_UINT64_V(last_update
, RTCState
, 3),
736 VMSTATE_INT64_V(offset
, RTCState
, 3),
737 VMSTATE_TIMER_V(update_timer
, RTCState
, 3),
738 VMSTATE_UINT64_V(next_alarm_time
, RTCState
, 3),
739 VMSTATE_END_OF_LIST()
743 static void rtc_notify_clock_reset(Notifier
*notifier
, void *data
)
745 RTCState
*s
= container_of(notifier
, RTCState
, clock_reset_notifier
);
746 int64_t now
= *(int64_t *)data
;
748 rtc_set_date_from_host(ISA_DEVICE(s
));
749 periodic_timer_update(s
, now
);
750 check_update_timer(s
);
752 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
753 rtc_coalesced_timer_update(s
);
758 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
759 BIOS will read it and start S3 resume at POST Entry */
760 static void rtc_notify_suspend(Notifier
*notifier
, void *data
)
762 RTCState
*s
= container_of(notifier
, RTCState
, suspend_notifier
);
763 rtc_set_memory(ISA_DEVICE(s
), 0xF, 0xFE);
766 static void rtc_reset(void *opaque
)
768 RTCState
*s
= opaque
;
770 s
->cmos_data
[RTC_REG_B
] &= ~(REG_B_PIE
| REG_B_AIE
| REG_B_SQWE
);
771 s
->cmos_data
[RTC_REG_C
] &= ~(REG_C_UF
| REG_C_IRQF
| REG_C_PF
| REG_C_AF
);
772 check_update_timer(s
);
774 qemu_irq_lower(s
->irq
);
777 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
778 s
->irq_coalesced
= 0;
783 static const MemoryRegionOps cmos_ops
= {
784 .read
= cmos_ioport_read
,
785 .write
= cmos_ioport_write
,
787 .min_access_size
= 1,
788 .max_access_size
= 1,
790 .endianness
= DEVICE_LITTLE_ENDIAN
,
793 static void rtc_get_date(Object
*obj
, Visitor
*v
, void *opaque
,
794 const char *name
, Error
**errp
)
796 RTCState
*s
= MC146818_RTC(obj
);
797 struct tm current_tm
;
800 rtc_get_time(s
, ¤t_tm
);
801 visit_start_struct(v
, NULL
, "struct tm", name
, 0, errp
);
802 visit_type_int32(v
, ¤t_tm
.tm_year
, "tm_year", errp
);
803 visit_type_int32(v
, ¤t_tm
.tm_mon
, "tm_mon", errp
);
804 visit_type_int32(v
, ¤t_tm
.tm_mday
, "tm_mday", errp
);
805 visit_type_int32(v
, ¤t_tm
.tm_hour
, "tm_hour", errp
);
806 visit_type_int32(v
, ¤t_tm
.tm_min
, "tm_min", errp
);
807 visit_type_int32(v
, ¤t_tm
.tm_sec
, "tm_sec", errp
);
808 visit_end_struct(v
, errp
);
811 static void rtc_realizefn(DeviceState
*dev
, Error
**errp
)
813 ISADevice
*isadev
= ISA_DEVICE(dev
);
814 RTCState
*s
= MC146818_RTC(dev
);
817 s
->cmos_data
[RTC_REG_A
] = 0x26;
818 s
->cmos_data
[RTC_REG_B
] = 0x02;
819 s
->cmos_data
[RTC_REG_C
] = 0x00;
820 s
->cmos_data
[RTC_REG_D
] = 0x80;
822 /* This is for historical reasons. The default base year qdev property
823 * was set to 2000 for most machine types before the century byte was
826 * This if statement means that the century byte will be always 0
827 * (at least until 2079...) for base_year = 1980, but will be set
828 * correctly for base_year = 2000.
830 if (s
->base_year
== 2000) {
834 rtc_set_date_from_host(isadev
);
837 switch (s
->lost_tick_policy
) {
838 case LOST_TICK_POLICY_SLEW
:
840 timer_new_ns(rtc_clock
, rtc_coalesced_timer
, s
);
842 case LOST_TICK_POLICY_DISCARD
:
845 error_setg(errp
, "Invalid lost tick policy.");
850 s
->periodic_timer
= timer_new_ns(rtc_clock
, rtc_periodic_timer
, s
);
851 s
->update_timer
= timer_new_ns(rtc_clock
, rtc_update_timer
, s
);
852 check_update_timer(s
);
854 s
->clock_reset_notifier
.notify
= rtc_notify_clock_reset
;
855 qemu_clock_register_reset_notifier(QEMU_CLOCK_REALTIME
,
856 &s
->clock_reset_notifier
);
858 s
->suspend_notifier
.notify
= rtc_notify_suspend
;
859 qemu_register_suspend_notifier(&s
->suspend_notifier
);
861 memory_region_init_io(&s
->io
, OBJECT(s
), &cmos_ops
, s
, "rtc", 2);
862 isa_register_ioport(isadev
, &s
->io
, base
);
864 qdev_set_legacy_instance_id(dev
, base
, 3);
865 qemu_register_reset(rtc_reset
, s
);
867 object_property_add(OBJECT(s
), "date", "struct tm",
868 rtc_get_date
, NULL
, NULL
, s
, NULL
);
871 ISADevice
*rtc_init(ISABus
*bus
, int base_year
, qemu_irq intercept_irq
)
877 isadev
= isa_create(bus
, TYPE_MC146818_RTC
);
878 dev
= DEVICE(isadev
);
879 s
= MC146818_RTC(isadev
);
880 qdev_prop_set_int32(dev
, "base_year", base_year
);
881 qdev_init_nofail(dev
);
883 s
->irq
= intercept_irq
;
885 isa_init_irq(isadev
, &s
->irq
, RTC_ISA_IRQ
);
890 static Property mc146818rtc_properties
[] = {
891 DEFINE_PROP_INT32("base_year", RTCState
, base_year
, 1980),
892 DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState
,
893 lost_tick_policy
, LOST_TICK_POLICY_DISCARD
),
894 DEFINE_PROP_END_OF_LIST(),
897 static void rtc_class_initfn(ObjectClass
*klass
, void *data
)
899 DeviceClass
*dc
= DEVICE_CLASS(klass
);
901 dc
->realize
= rtc_realizefn
;
902 dc
->vmsd
= &vmstate_rtc
;
903 dc
->props
= mc146818rtc_properties
;
904 /* Reason: needs to be wired up by rtc_init() */
905 dc
->cannot_instantiate_with_device_add_yet
= true;
908 static const TypeInfo mc146818rtc_info
= {
909 .name
= TYPE_MC146818_RTC
,
910 .parent
= TYPE_ISA_DEVICE
,
911 .instance_size
= sizeof(RTCState
),
912 .class_init
= rtc_class_initfn
,
915 static void mc146818rtc_register_types(void)
917 type_register_static(&mc146818rtc_info
);
920 type_init(mc146818rtc_register_types
)