3 #define BIOS_FILENAME "mips_bios.bin"
4 //#define BIOS_FILENAME "system.bin"
5 #define KERNEL_LOAD_ADDR 0x80010000
6 #define INITRD_LOAD_ADDR 0x80800000
12 static void pic_irq_request(void *opaque
, int level
)
14 CPUState
*env
= first_cpu
;
16 env
->CP0_Cause
|= 0x00000400;
17 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
19 env
->CP0_Cause
&= ~0x00000400;
20 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
24 void cpu_mips_irqctrl_init (void)
28 uint32_t cpu_mips_get_random (CPUState
*env
)
30 uint32_t now
= qemu_get_clock(vm_clock
);
32 return now
% (MIPS_TLB_NB
- env
->CP0_Wired
) + env
->CP0_Wired
;
36 uint32_t cpu_mips_get_count (CPUState
*env
)
38 return env
->CP0_Count
+
39 (uint32_t)muldiv64(qemu_get_clock(vm_clock
),
40 100 * 1000 * 1000, ticks_per_sec
);
43 static void cpu_mips_update_count (CPUState
*env
, uint32_t count
,
52 now
= qemu_get_clock(vm_clock
);
53 next
= now
+ muldiv64(compare
- tmp
, ticks_per_sec
, 100 * 1000 * 1000);
58 fprintf(logfile
, "%s: 0x%08llx %08x %08x => 0x%08llx\n",
59 __func__
, now
, count
, compare
, next
- now
);
62 /* Store new count and compare registers */
63 env
->CP0_Compare
= compare
;
65 count
- (uint32_t)muldiv64(now
, 100 * 1000 * 1000, ticks_per_sec
);
67 qemu_mod_timer(env
->timer
, next
);
70 void cpu_mips_store_count (CPUState
*env
, uint32_t value
)
72 cpu_mips_update_count(env
, value
, env
->CP0_Compare
);
75 void cpu_mips_store_compare (CPUState
*env
, uint32_t value
)
77 cpu_mips_update_count(env
, cpu_mips_get_count(env
), value
);
78 env
->CP0_Cause
&= ~0x00008000;
79 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
82 static void mips_timer_cb (void *opaque
)
89 fprintf(logfile
, "%s\n", __func__
);
92 cpu_mips_update_count(env
, cpu_mips_get_count(env
), env
->CP0_Compare
);
93 env
->CP0_Cause
|= 0x00008000;
94 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
97 void cpu_mips_clock_init (CPUState
*env
)
99 env
->timer
= qemu_new_timer(vm_clock
, &mips_timer_cb
, env
);
100 env
->CP0_Compare
= 0;
101 cpu_mips_update_count(env
, 1, 0);
104 static void io_writeb (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
108 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, value
);
110 cpu_outb(NULL
, addr
& 0xffff, value
);
113 static uint32_t io_readb (void *opaque
, target_phys_addr_t addr
)
115 uint32_t ret
= cpu_inb(NULL
, addr
& 0xffff);
118 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, ret
);
123 static void io_writew (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
127 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, value
);
129 #ifdef TARGET_WORDS_BIGENDIAN
130 value
= bswap16(value
);
132 cpu_outw(NULL
, addr
& 0xffff, value
);
135 static uint32_t io_readw (void *opaque
, target_phys_addr_t addr
)
137 uint32_t ret
= cpu_inw(NULL
, addr
& 0xffff);
138 #ifdef TARGET_WORDS_BIGENDIAN
143 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, ret
);
148 static void io_writel (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
152 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, value
);
154 #ifdef TARGET_WORDS_BIGENDIAN
155 value
= bswap32(value
);
157 cpu_outl(NULL
, addr
& 0xffff, value
);
160 static uint32_t io_readl (void *opaque
, target_phys_addr_t addr
)
162 uint32_t ret
= cpu_inl(NULL
, addr
& 0xffff);
164 #ifdef TARGET_WORDS_BIGENDIAN
169 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, ret
);
174 CPUWriteMemoryFunc
*io_write
[] = {
180 CPUReadMemoryFunc
*io_read
[] = {
186 void mips_r4k_init (int ram_size
, int vga_ram_size
, int boot_device
,
187 DisplayState
*ds
, const char **fd_filename
, int snapshot
,
188 const char *kernel_filename
, const char *kernel_cmdline
,
189 const char *initrd_filename
)
192 target_ulong kernel_base
, kernel_size
, initrd_base
, initrd_size
;
193 unsigned long bios_offset
;
199 printf("%s: start\n", __func__
);
200 linux_boot
= (kernel_filename
!= NULL
);
203 register_savevm("cpu", 0, 3, cpu_save
, cpu_load
, env
);
206 cpu_register_physical_memory(0, ram_size
, IO_MEM_RAM
);
207 bios_offset
= ram_size
+ vga_ram_size
;
208 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, BIOS_FILENAME
);
209 printf("%s: load BIOS '%s' size %d\n", __func__
, buf
, BIOS_SIZE
);
210 ret
= load_image(buf
, phys_ram_base
+ bios_offset
);
211 if (ret
!= BIOS_SIZE
) {
212 fprintf(stderr
, "qemu: could not load MIPS bios '%s'\n", buf
);
215 cpu_register_physical_memory((uint32_t)(0x1fc00000),
216 BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
218 memcpy(phys_ram_base
+ 0x10000, phys_ram_base
+ bios_offset
, BIOS_SIZE
);
219 env
->PC
= 0x80010004;
221 env
->PC
= 0xBFC00004;
224 kernel_base
= KERNEL_LOAD_ADDR
;
225 /* now we can load the kernel */
226 kernel_size
= load_image(kernel_filename
,
227 phys_ram_base
+ (kernel_base
- 0x80000000));
228 if (kernel_size
== (target_ulong
) -1) {
229 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
234 if (initrd_filename
) {
235 initrd_base
= INITRD_LOAD_ADDR
;
236 initrd_size
= load_image(initrd_filename
,
237 phys_ram_base
+ initrd_base
);
238 if (initrd_size
== (target_ulong
) -1) {
239 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
247 env
->PC
= KERNEL_LOAD_ADDR
;
248 /* Store command line. */
249 strcpy (phys_ram_base
+ (16 << 20) - 256, kernel_cmdline
);
250 /* FIXME: little endian support */
251 *(int *)(phys_ram_base
+ (16 << 20) - 260) = tswap32 (0x12345678);
252 *(int *)(phys_ram_base
+ (16 << 20) - 264) = tswap32 (ram_size
);
260 /* Init internal devices */
261 cpu_mips_clock_init(env
);
262 cpu_mips_irqctrl_init();
264 /* Register 64 KB of ISA IO space at 0x14000000 */
265 io_memory
= cpu_register_io_memory(0, io_read
, io_write
, NULL
);
266 cpu_register_physical_memory(0x14000000, 0x00010000, io_memory
);
267 isa_mem_base
= 0x10000000;
269 isa_pic
= pic_init(pic_irq_request
, env
);
270 pit
= pit_init(0x40, 0);
271 serial_init(&pic_set_irq_new
, isa_pic
, 0x3f8, 4, serial_hds
[0]);
272 vga_initialize(NULL
, ds
, phys_ram_base
+ ram_size
, ram_size
,
275 if (nd_table
[0].vlan
) {
276 if (nd_table
[0].model
== NULL
277 || strcmp(nd_table
[0].model
, "ne2k_isa") == 0) {
278 isa_ne2000_init(0x300, 9, &nd_table
[0]);
280 fprintf(stderr
, "qemu: Unsupported NIC: %s\n", nd_table
[0].model
);
286 QEMUMachine mips_machine
= {