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.travis.yml: make the make slightly more parallel
2014-09-26
Alex Benn
é
e
.
tra
v
is
.
y
ml:
m
ak
e
t
h
e make
s
lightly m
o
re par
a
ll
e
l
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-09-26
Alex
B
en
n
ée
.
travis
.
yml: add more li
n
ux
-
user t
o
t
he build matrix
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
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tree
2014-09-26
A
l
e
x Benn
é
e
o
hci:
drop compu
t
ed flag
s
f
r
om trace events
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-09-26
Alex Bennée
scripts/tracetool: don't barf on form
a
ts with pr
e
cision
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
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2014-08-12
Alex Bennée
tr
a
ce: add some
t
c
g
t
r
acing s
u
ppor
t
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-08-12
Alex Benné
e
trace: teach lttng
backend to use
f
o
rmat strings
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-08-04
Alex Benn
é
e
tar
g
et-arm: A
6
4: fix TLB
f
lu
s
h
instr
u
c
tions
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
...1406733627-24255-3-git-send-email-
alex.bennee@linaro.org
commit
|
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2014-08-04
Alex Bennée
t
arge
t
-arm: don't hard
c
ode mas
k
values in ar
m
_cpu_handle_m
m
u
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
...1406733627-24255-2-git-send-email-
alex.bennee@linaro.org
commit
|
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2014-04-17
A
lex Bennée
target-arm: A64:
f
ix
u
nallocated
test
o
f scal
a
r
S
QXTUN
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-18
Alex Bennée
targ
e
t-arm:
A64:
Add saturating accumula
t
e ops (US
Q
ADD
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-18
Alex Bennée
ta
r
get-arm: A6
4
: Add satu
r
ating
int ops (S
Q
N
E
G/SQABS)
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Alex Bennée
target-arm: A64: Add [UF]RSQR
T
E (
r
eciprocal root estim
a
t
e
)
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Al
e
x Benné
e
target-arm
:
A64:
Implement scalar satu
r
a
ti
n
g narro
w
ops
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-03-17
Alex
Ben
n
ée
t
arget-
a
rm:
A
64: Move h
a
ndle_2misc_narrow function
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
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2014-03-17
Alex Bennée
tar
g
et-arm: A6
4
: Implement A
d
v
SIMD
reciprocal est
i
mate
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
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2014-03-17
Alex Bennée
so
f
tfloat: expor
t
squash_
i
nput_denorm
a
l functions
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
A
l
ex Bennée
ta
r
g
e
t
-
arm:
A
64: Add FRECPX (reciprocal exponent)
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Alex Benn
é
e
target-arm: A6
4
:
Saturat
i
ng and na
r
rowing
s
hift ops
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Alex Bennée
t
a
rget
-
a
r
m:
A64: Add r
e
maining CLS/Z vector ops
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Alex Bennée
t
a
rge
t
-arm: A64: Add FSQRT to C
3
.
6
.
17 (two mi
s
c
)
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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2014-03-17
Alex Bennée
target-arm: A64: Add last Adv
S
IMD Integer to F
P
ops
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-17
Alex Bennée
ta
r
get-a
r
m: A64: Fix bug in add
_
sub_ex
t
handling of
rn
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
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2014-03-15
Alex Benn
é
e
.
travis
.
yml: add
IRC no
t
ifica
t
ions for build failures
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
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2014-03-15
A
lex Bennée
.
travis
.
y
m
l
: trivial whitespace fixup
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-15
Alex B
e
nnée
.
travis
.
yml:
r
e-enable lttng user space trace test
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-03-15
Alex Ben
n
ée
.
t
ravis
.
yml: ad
d
a new b
u
ild
target with non
-
core devlibs
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
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2014-02-20
A
lex Benné
e
target-arm
:
A
6
4
: Implem
e
nt
floating
point pairwi
s
e
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-02-20
Alex
B
ennée
ta
r
ge
t
-arm: A64: Imp
l
ement
SIMD FP compare and
set
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-02-08
Alex Benné
e
target-a
r
m
:
A
64: Add 2
-
reg-mi
s
c R
E
V
* instructions
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
Alex Benn
é
e
target-ar
m
: A
6
4: Add SIMD shift by
immediate
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
Al
e
x Bennée
t
arget-arm: A64: Add SIMD modified immediate group
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
A
l
e
x
Be
n
née
t
a
rget-arm: A6
4
: Add SIMD copy
o
pera
t
ions
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
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2014-01-31
A
l
ex Ben
n
é
e
target-arm: A6
4
: Add decode skeleton for SIMD
d
ata
.
.
.
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2014-01-31
A
l
e
x
Bennée
target-arm: A64: Add SIMD ld/st multiple
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
commit
|
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|
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2014-01-08
Alex
B
ennée
.
t
r
avis
.
yml: Ad
d
aarch64-* targ
e
ts
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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|
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2014-01-07
A
lex Bennée
.
tr
a
vis
.
yml:
Ad
d
aarch
6
4-* t
a
rgets
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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|
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2013-12-23
A
l
ex Bennée
t
arget-arm: A64: a
d
d su
p
port f
o
r
m
ove wide
in
s
tructions
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2013-12-23
A
l
ex Bennée
t
a
r
get-arm: A64: add suppo
r
t for add, addi, sub,
s
u
bi
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2013-12-23
Al
e
x Benné
e
t
arget-arm: A64:
a
d
d
support
for ld/st w
i
th index
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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2013-12-23
Al
e
x
B
ennée
ta
r
get-
a
rm: A6
4
: add suppor
t
for ld/s
t
with
r
eg offset
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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|
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|
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2013-12-23
A
lex Bennée
tar
g
et-
a
rm
:
A64: add s
u
pport for l
d
/st unsigned imm
Signed-off-by: Alex Bennée <
alex.bennee@linaro.org
>
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