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target/mips: Remove vendor specific CPU definitions
2021-01-14 Philippe Mathieu... target/mips: Remove vendor specific CPU definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210112210152.2072996-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove CPU_NANOMIPS32 definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210112210152.2072996-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove CPU_R5900 definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210112210152.2072996-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LL/SC opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-14-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LLD/SCD opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-13-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-12-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-11-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208203704.243704-10-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-9-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 COP1X opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-8-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Convert Rel6 Special2 opcode to decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-7-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove now unreachable LSA/DLSA opcodes...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201208203704.243704-6-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce decodetree helpers for Release6...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-24-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce decodetree helpers for MSA LSA...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-23-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract LSA/DLSA translation generators
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-22-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Use decode_ase_msa() generated from decodetree
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-21-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce decode tree bindings for MSA ASE
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-20-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Pass TCGCond argument to MSA gen_check_zero_ele...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-25-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract MSA translation routines
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Declare gen_msa/_branch() in 'translate.h'
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-18-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract MSA helper definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract MSA helpers from op_helper.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201123204448.3260804-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Move msa_reset() to msa_helper.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201215225757.764263-15-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-10-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove CPUMIPSState* argument from gen_msa...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-9-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract msa_translate_init() from mips_tcg_init()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-8-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Alias MSA vector registers on FPU scalar...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-7-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove now unused ASE_MSA definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-6-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Simplify MSA TCG logic
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Simplify msa_reset()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Introduce ase_msa_available() helper
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201208003702.4088927-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/translate: Expose check_mips_64() to 32...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215225757.764263-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/translate: Extract decode_opc_legacy()...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215225757.764263-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Only build TCG code when CONFIG_TCG is set
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201206233949.3783184-20-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract FPU specific definitions to translate.h
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201214183739.500368-16-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Declare generic FPU / Coprocessor functions...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201214183739.500368-15-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Replace gen_exception_end(EXCP_RI) by...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201214183739.500368-12-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Replace gen_exception_err(err=0) by gen_excepti...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201214183739.500368-11-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/translate: Add declarations for generic...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201207235539.4070364-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/translate: Extract DisasContext structure
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201207235539.4070364-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Rename translate_init.c as cpu-defs.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201214183739.500368-10-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Move mmu_init() functions to tlb_helper.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201206233949.3783184-15-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Fix code style for checkpatch.pl
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201206233949.3783184-14-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Rename helper.c as tlb_helper.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201206233949.3783184-13-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Move common helpers from helper.c to cpu.c
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201214183739.500368-6-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201214183739.500368-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Add !CONFIG_USER_ONLY comment after #endif
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201214183739.500368-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Extract FPU helpers to 'fpu_helper.h'
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201120210844.2625602-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Inline cpu_state_reset() in mips_cpu_reset()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201214183739.500368-2-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-16-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-15-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-14-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-13-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-12-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Use ISA_MIPS32R6 definition...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-11-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Use ISA_MIPS32R5 definition...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-10-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Use ISA_MIPS32R3 definition...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-9-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Use ISA_MIPS32R2 definition...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-8-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Use ISA_MIPS32 definition to...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-7-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... hw/mips/boston: Check 64-bit support with cpu_type_is_64bit()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-6-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-5-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Rename CPU_MIPSxx Release 1...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-4-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Reorder CPU_MIPS5 definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips/mips-defs: Remove USE_HOST_FLOAT_REGS comment
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20210104221154.3127610-2-f4bug@amsat.org>
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2021-01-14 Jiaxun Yangtarget/mips/addr: Add translation helpers for KSEG1
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Replace CP0_Config0 magic values by proper...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201201132817.2863301-3-f4bug@amsat.org>
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2021-01-14 Philippe Mathieu... target/mips: Add CP0 Config0 register definitions for...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201201132817.2863301-2-f4bug@amsat.org>
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2021-01-04 Jiaxun Yangtests/acceptance: Test boot_linux_console for fuloong2e
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Jiaxun Yanghw/mips/fuloong2e: Correct cpuclock in PROM environment
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Jiaxun Yanghw/mips/fuloong2e: Remove unused env entry
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Jiaxun Yanghw/mips/fuloong2e: Replace faulty documentation links
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Jiaxun Yanghw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Jiaxun Yanghw/mips: Use address translation helper to handle ENVP_ADDR
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Jiaxun Yanghw/mips/malta: Use address translation helper to calculate...
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Jiaxun Yanghw/mips: Make bootloader addresses unsigned
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Huacai Chendocs/system: Update MIPS machine documentation
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Huacai Chenhw/mips: Add Loongson-3 machine support
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Huacai Chenhw/mips: Add Loongson-3 boot parameter helpers
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Huacai Chenhw/mips: Implement fw_cfg_arch_key_name()
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Huacai Chenhw/intc: Rework Loongson LIOINTC
Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Peter Maydellclock: Define and use new clock_display_freq()
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Peter Maydellclock: Remove clock_get_ns()
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Peter Maydelltarget/mips: Don't use clock_get_ns() in clock period...
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Peter Maydellclock: Introduce clock_ticks_to_ns()
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Rename superio config related parts
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Use shorter name for local variable holding...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Remove unneeded includes and defines
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Convert debug printf to trace points
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Remove legacy vt82c686b_pm_init() function
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 commit | commitdiff | tree
2021-01-04 BALATON Zoltanvt82c686: Remove legacy vt82c686b_isa_init() function
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanaudio/via-ac97: Simplify code and set user_creatable...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Split off via-[am]c97 into separate file...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Remove vt82c686b_[am]c97_init() functions
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 commit | commitdiff | tree
2021-01-04 BALATON Zoltanvt82c686: Rename VT82C686B to VT82C686B_ISA
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Remove unnecessary _DEVICE suffix from type...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 BALATON Zoltanvt82c686: Rename AC97/MC97 parts from VT82C686B to VIA
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2021-01-04 Philippe Mathieu... hw/pci-host/bonito: Use pci_config_set_interrupt_pin()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201231224911.1467352-5-f4bug@amsat.org>
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2021-01-04 Philippe Mathieu... hw/pci-host/bonito: Display hexadecimal value with...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201231224911.1467352-3-f4bug@amsat.org>
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2021-01-04 Philippe Mathieu... hw: Use the PCI_DEVFN() macro from 'hw/pci/pci.h'
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...Id: <20201231224911.1467352-4-f4bug@amsat.org>
 commit | commitdiff | tree
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