2018-12-17 | Richard Henderson | tcg/mips: Remove retranslation code ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/sparc: Remove retranslation code ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/s390: Remove retranslation code ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/ppc: Fold away "noaddr" branch routines ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/arm: Fold away "noaddr" branch routines ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/arm: Remove reloc_pc24_atomic ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/aarch64: Fold away "noaddr" branch routines ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/aarch64: Remove reloc_pc26_atomic ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/i386: Move TCG_REG_CALL_STACK from define to enum ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | tcg/i386: Always use %ebp for TCG_AREG0 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-17 | Richard Henderson | target/sparc: Remove the constant pool ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-12-13 | Richard Henderson | target/arm: Implement the ARMv8.1-LOR extension ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181210150501.7990-4-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Use arm_hcr_el2_eff more places ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181210150501.7990-3-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Introduce arm_hcr_el2_eff ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181210150501.7990-2-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Implement the ARMv8.2-AA32HPD extension ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181203203839.757-11-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Implement the ARMv8.1-HPD extension ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181203203839.757-10-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Tidy scr_write ...off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181203203839.757-8-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el ...off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181203203839.757-5-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Add SCR_EL3 bits up to ARMv8.5 ...off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181203203839.757-4-richard.henderson@linaro.org |
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2018-12-13 | Richard Henderson | target/arm: Add HCR_EL2 bits up to ARMv8.5 ...off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181203203839.757-3-richard.henderson@linaro.org |
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2018-11-27 | Richard Henderson | target/i386: Generate #UD when applying LOCK to a register... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...Id: <20181113193510.24862-1-richard.henderson@linaro.org> |
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2018-11-19 | Richard Henderson | target/arm: Fill in ARMISARegisters for kvm32 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181113180154.17903-5-richard.henderson@linaro.org |
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2018-11-19 | Richard Henderson | target/arm: Introduce read_sys_reg32 for kvm32 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181113180154.17903-4-richard.henderson@linaro.org |
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2018-11-19 | Richard Henderson | target/arm: Fill in ARMISARegisters for kvm64 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181113180154.17903-3-richard.henderson@linaro.org |
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2018-11-19 | Richard Henderson | target/arm: Install ARMISARegisters from kvm host ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181113180154.17903-2-richard.henderson@linaro.org |
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2018-11-13 | Richard Henderson | target/arm: Fix typo in tlbi_aa64_vmalle1_write ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181110121711.15257-1-richard.henderson@linaro.org |
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2018-11-08 | Richard Henderson | target/ppc: Split out float_invalid_cvt ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-08 | Richard Henderson | target/ppc: Split out float_invalid_op_div ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-08 | Richard Henderson | target/ppc: Split out float_invalid_op_mul ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-08 | Richard Henderson | target/ppc: Split out float_invalid_op_addsub ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-08 | Richard Henderson | target/ppc: Introduce fp number classification ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-08 | Richard Henderson | target/ppc: Remove float_check_status ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-08 | Richard Henderson | target/ppc: Split up float_invalid_op_excp ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-04 | Richard Henderson | softfloat: Don't execute divdeu without power7 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-11-02 | Richard Henderson | target/arm: Conditionalize some asserts on aarch32... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181102102025.3546-1-richard.henderson@linaro.org |
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2018-10-31 | Richard Henderson | decodetree: Allow multiple input files ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | decodetree: Remove "insn" argument from trans_* expanders ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | decodetree: Add !extern flag to argument sets ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Remove tlb_c.pending_flushes ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Filter flushes on already clean tlbs ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Count "partial" and "elided" tlb flushes ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Merge tlb_flush_page into tlb_flush_page_by_mmuidx ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Merge tlb_flush_nocheck into tlb_flush_by_mmuidx_asy... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Move env->vtlb_index to env->tlb_d.vindex ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Split large page tracking per mmu_idx ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Move cpu->pending_tlb_flush to env->tlb_c.pending_flush ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Remove tcg_enabled hack from tlb_flush_nocheck ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-31 | Richard Henderson | cputlb: Move tlb_lock to CPUTLBCommon ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-24 | Richard Henderson | target/arm: Only flush tlb if ASID changes ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181019015617.22583-3-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Remove writefn from TTBR0_EL3 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181019015617.22583-2-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Reorg NEON VLD/VST single element to one... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-21-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Promote consecutive memory ops for aa32 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-20-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Reorg NEON VLD/VST all elements ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-19-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON VLD all lanes ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-18-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-17-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON_3R_VML ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-16-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for VSRI, VSLI ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-15-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for VSRA ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-14-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for VSHR, VSHL ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-13-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON_3R_VMUL ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-12-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON_2RM_VMN, NEON_2RM_VNEG ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-11-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON_3R_VADD_VSUB insns ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-10-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON_3R_LOGIC insns ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-9-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON VMOV, VMVN, VBIC & VORR... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-8-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use gvec for NEON VDUP ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-7-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Mark some arrays const ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-6-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Promote consecutive memory ops for aa64 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-5-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-4-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Don't call tcg_clear_temp_count ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181011205206.3552-3-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181016223115.24100-9-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Convert sve from feature bit to aa64pfr0... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181016223115.24100-8-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Convert jazelle from feature bit to isar1... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181016223115.24100-6-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Convert division from feature bits to isar0... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181016223115.24100-5-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Convert v8 extensions from feature bits... ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181016223115.24100-4-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: V8M should not imply V7VE ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181016223115.24100-3-richard.henderson@linaro.org |
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2018-10-24 | Richard Henderson | target/arm: Move some system registers into a substructure ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181016223115.24100-2-richard.henderson@linaro.org |
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2018-10-23 | Richard Henderson | osdep: Work around MinGW assert ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181022181623.8810-1-richard.henderson@linaro.org |
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2018-10-19 | Richard Henderson | target/s390x: Check HAVE_ATOMIC128 and HAVE_CMPXCHG128... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | target/s390x: Skip wout, cout helpers if op helper... ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | target/s390x: Split do_cdsg, do_lpq, do_stpq ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | target/s390x: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | target/ppc: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | target/arm: Check HAVE_CMPXCHG128 at translate time ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | target/arm: Convert to HAVE_CMPXCHG128 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | target/i386: Convert to HAVE_CMPXCHG128 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | tcg: Split CONFIG_ATOMIC128 ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | tcg: Add tlb_index and tlb_entry helpers ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-19 | Richard Henderson | tcg: Implement CPU_LOG_TB_NOCHAIN during expansion ...off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-10-16 | Richard Henderson | target/arm: Fix cortex-a7 id_isar0 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181008212205.17752-6-richard.henderson@linaro.org |
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2018-10-16 | Richard Henderson | target/arm: Align cortex-r5 id_isar0 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181008212205.17752-5-richard.henderson@linaro.org |
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2018-10-16 | Richard Henderson | target/arm: Define fields of ISAR registers ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181008212205.17752-3-richard.henderson@linaro.org |
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2018-10-16 | Richard Henderson | target/arm: Fix aarch64_sve_change_el wrt EL0 ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181008212205.17752-2-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Pass TCGMemOpIdx to sve memory helpers ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-16-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Rewrite vector gather first-fault loads ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-15-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Rewrite vector gather stores ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-14-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Rewrite vector gather loads ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-13-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Split contiguous stores for endianness ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-12-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Split contiguous loads for endianness ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-11-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Rewrite helper_sve_st[1234]*_r ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-10-richard.henderson@linaro.org |
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2018-10-08 | Richard Henderson | target/arm: Rewrite helper_sve_ld[234]*_r ...off-by: Richard Henderson <richard.henderson@linaro.org> ...id: 20181005175350.30752-9-richard.henderson@linaro.org |
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