2021-06-24 | Philippe Mathieu... | target/mips: Optimize regnames[] arrays ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-10-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Constify host_to_mips_errno[] ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-9-f4bug@amsat.org> |
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2021-06-24 | Aleksandar Rikalo | target/mips: fix emulation of nanoMIPS BPOSGE32 instruction Reported-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-8-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Remove SmartMIPS / MDMX unuseful comments ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-7-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Restrict some system specific declarations... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-6-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Move translate.h to tcg/ sub directory ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-5-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Move TCG trace events to tcg/ sub directory ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-4-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Do not abort on invalid instruction ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-2-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Raise exception when DINSV opcode used... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210529165443.1114402-1-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Fix more TCG temporary leaks in gen_pool32a5_na... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210617174323.2900831-3-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomip... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210530094538.1275329-1-f4bug@amsat.org> |
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2021-06-24 | Philippe Mathieu... | target/mips: Fix potential integer overflow (CID 1452921) ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210505215119.1517465-1-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Convert check-dco/check-patch jobs to the ... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210525132418.4133235-3-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Use $CI_DEFAULT_BRANCH instead of hardcoded... |
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2021-05-27 | Philippe Mathieu... | gitlab: Run Avocado tests manually (except mainstream CI) ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210525082556.4011380-9-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Keep Avocado reports during 1 week ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210525082556.4011380-8-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract cross-container jobs to container-cross.yml ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210525082556.4011380-5-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Document how forks can use different set of... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210525082556.4011380-4-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Move current job set to qemu-project.yml ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210511072952.2813358-11-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract all default build/test jobs to buildtest.yml ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210511072952.2813358-9-f4bug@amsat.org> |
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2021-05-27 | Daniel P. Berrangé | gitlab: Drop linux user build job for CentOS 7 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract core container jobs to container-core.yml ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210519185504.2198573-10-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract default build/test jobs templates ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210519185504.2198573-8-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract build stages to stages.yml ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210519185504.2198573-7-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract DCO/style check jobs to static_checks.yml ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210519185504.2198573-6-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract crossbuild job templates to crossbuild... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210519185504.2198573-5-f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Extract container job template to container... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210519185504.2198573-4-f4bug@amsat.org> |
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2021-05-27 | Richard Henderson | gitlab: Enable cross-i386 builds of TCI Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-05-27 | Richard Henderson | gitlab: Rename ACCEL_CONFIGURE_OPTS to EXTRA_CONFIGURE_OPTS Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-05-27 | Philippe Mathieu... | gitlab: Replace YAML anchors by extends (acceptance_test_job) ...Id: <20210519185504.2198573-2-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | gitlab-ci: Add KVM mips64el cross-build jobs ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-31-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | hw/mips: Restrict non-virtualized machines to TCG ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-30-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move TCG source files under tcg/ sub directory ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-29-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move CP0 helpers to sysemu/cp0.c ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-28-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move exception management code to exception.c ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-27-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move TLB management helpers to tcg/sysemu... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-26-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move helper_cache() to tcg/sysemu/special_helper.c ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-25-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move Special opcodes to tcg/sysemu/special_helper.c ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-24-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Restrict CPUMIPSTLBContext::map_address... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-23-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move tlb_helper.c to tcg/sysemu/ ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-22-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Restrict mmu_init() to TCG ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-21-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move sysemu TCG-specific code to tcg/sysemu... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-20-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Restrict cpu_mips_get_random() / update_pagemas... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-19-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move physical addressing code to sysemu... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-18-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move sysemu specific files under sysemu... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-17-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move cpu_signal_handler definition around ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-16-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Add simple user-mode mips_cpu_tlb_fill() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-15-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Add simple user-mode mips_cpu_do_interrupt() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-14-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Introduce tcg-internal.h for TCG specific... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-13-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | meson: Introduce meson_user_arch source set for arch... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-12-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Extract load/store helpers to ldst_helper.c ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-11-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Merge do_translate_address into cpu_mips_transl... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210428170410.479308-10-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Declare mips_env_set_pc() inlined in ... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-9-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Turn printfpr() macro into a proper function ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-8-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Restrict mips_cpu_dump_state() to cpu.c ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-7-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Optimize CPU/FPU regnames[] arrays ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-6-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Make CPU/FPU regnames[] arrays global ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-5-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move msa_reset() to new source file ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-4-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Move IEEE rounding mode array to new source... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-3-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Simplify meson TCG rules ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-2-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Make check_cp0_enabled() return a boolean ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210420193453.1913810-4-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Migrate missing CPU fields ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210423220044.3004195-1-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210422081055.2349216-1-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Add missing CP0 check to nanoMIPS RDPGPR... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210421185007.2231855-1-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | target/mips: Fix CACHEE opcode (CACHE using EVA addressing) ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210420175426.1875746-1-f4bug@amsat.org> |
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2021-05-02 | Philippe Mathieu... | hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210324182902.692419-1-f4bug@amsat.org> |
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2021-04-13 | Philippe Mathieu... | target/mips: Fix TCG temporary leak in gen_cache_operation() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210406202857.1440744-1-f4bug@amsat.org> |
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2021-04-13 | Philippe Mathieu... | hw/isa/piix4: Migrate Reset Control Register ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210324200334.729899-1-f4bug@amsat.org> |
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2021-04-13 | Philippe Mathieu... | hw/isa/Kconfig: Add missing dependency VIA VT82C686... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210302080531.913802-1-f4bug@amsat.org> |
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2021-03-22 | Bin Meng | hw/sd: sdhci: Reset the data pointer of s->fifo_buffer... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Bin Meng | hw/sd: sdhci: Limit block size only when SDHC_BLKSIZE... Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Bin Meng | hw/sd: sdhci: Correctly set the controller status for... Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Bin Meng | hw/sd: sdhci: Don't write to SDHC_SYSAD register when... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Bin Meng | hw/sd: sdhci: Don't transfer any data when command... Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Bin Meng | hw/sd: sd: Actually perform the erase operation Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Bin Meng | hw/sd: sd: Fix build error when DEBUG_SD is on Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Jiaxun Yang | target/mips: Deprecate Trap-and-Emul KVM support Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-22 | Peter Maydell | target/mips/mxu_translate.c: Fix array overrun for... Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-14 | Ivanov Arkasha | target/avr: Fix interrupt execution ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-14 | Lichang Zhao | target/avr: Fix some comment spelling errors Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org> ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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2021-03-14 | Philippe Mathieu... | hw/avr/arduino: List board schematic links ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210313165445.2113938-3-f4bug@amsat.org> |
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2021-03-14 | Philippe Mathieu... | hw/misc/led: Add yellow LED ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210313165445.2113938-2-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips/tx79: Salvage instructions description... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210214175912.732946-15-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Remove 'C790 Multimedia Instructions'... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210214175912.732946-14-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210214175912.732946-13-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips/tx79: Move PCPYH opcode to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210214175912.732946-12-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips/translate: Simplify PCPYH using deposit_i64() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210214175912.732946-11-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips/translate: Make gen_rdhwr() public ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210214175912.732946-28-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210214175912.732946-10-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210214175912.732946-9-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Use gen_load_gpr[_hi]() when possible ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210308131604.460693-1-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Extract MXU code to new mxu_translate... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-14-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Introduce mxu_translate_init() helper ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-13-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Simplify decode_opc_mxu() ifdef'ry ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-12-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Convert decode_ase_mxu() to decodetree... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-11-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Rename decode_opc_mxu() as decode_ase_mxu() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-10-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Move MUL opcode check from decode_mxu... ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-9-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Use OPC_MUL instead of OPC__MXU_MUL ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-8-f4bug@amsat.org> |
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2021-03-13 | Philippe Mathieu... | target/mips: Pass instruction opcode to decode_opc_mxu() ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ...Id: <20210226093111.3865906-7-f4bug@amsat.org> |
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