From a6c242aaf52409ea827665e6f5f84b446d17a859 Mon Sep 17 00:00:00 2001 From: Matt Redfearn Date: Tue, 15 Aug 2017 15:44:17 +0100 Subject: [PATCH] PCI: PCIe access should always be little endian PCIe busses are always little endian, so set the endianness of the memory region to little endian rather than native such that operations work as expected on big endian targets. Signed-off-by: Matt Redfearn Reviewed-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci/pcie_host.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index dcebf57ed4..553db56778 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -81,7 +81,7 @@ static uint64_t pcie_mmcfg_data_read(void *opaque, static const MemoryRegionOps pcie_mmcfg_ops = { .read = pcie_mmcfg_data_read, .write = pcie_mmcfg_data_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pcie_host_init(Object *obj) -- 2.11.4.GIT