From 83b92b8efca6634406361d62dbf9d3e8369a2a20 Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Thu, 6 Jan 2022 07:39:30 +1000 Subject: [PATCH] hw/intc: sifive_plic: Add a reset function MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng Message-Id: <20220105213937.1113508-2-alistair.francis@opensource.wdc.com> --- hw/intc/sifive_plic.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index 877e76877c..a9f7a1bfb0 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -355,6 +355,23 @@ static const MemoryRegionOps sifive_plic_ops = { } }; +static void sifive_plic_reset(DeviceState *dev) +{ + SiFivePLICState *s = SIFIVE_PLIC(dev); + int i; + + memset(s->source_priority, 0, sizeof(uint32_t) * s->num_sources); + memset(s->target_priority, 0, sizeof(uint32_t) * s->num_addrs); + memset(s->pending, 0, sizeof(uint32_t) * s->bitfield_words); + memset(s->claimed, 0, sizeof(uint32_t) * s->bitfield_words); + memset(s->enable, 0, sizeof(uint32_t) * s->num_enables); + + for (i = 0; i < s->num_harts; i++) { + qemu_set_irq(s->m_external_irqs[i], 0); + qemu_set_irq(s->s_external_irqs[i], 0); + } +} + /* * parse PLIC hart/mode address offset config * @@ -501,6 +518,7 @@ static void sifive_plic_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->reset = sifive_plic_reset; device_class_set_props(dc, sifive_plic_properties); dc->realize = sifive_plic_realize; dc->vmsd = &vmstate_sifive_plic; -- 2.11.4.GIT