| commit | fe31d6c72d0046eb633db51dc1d8fb9b231d270f | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 6 Feb 2024 13:29:20 +0000 (6 13:29 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 15 Feb 2024 14:32:38 +0000 (15 14:32 +0000) | ||
| tree | 268c3f957692b4a0528bda5032bd523f98e1a880 | treesnapshot (tar.gz zip) |
| parent | b2f24983db11dd1345db95f54a6d1dce184224a3 | commitdiff |
target/arm: The Cortex-R52 has a read-only CBAR
The Cortex-R52 implements the Configuration Base Address Register
(CBAR), as a read-only register. Add ARM_FEATURE_CBAR_RO to this CPU
type, so that our implementation provides the register and the
associated qdev property.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240206132931.38376-3-peter.maydell@linaro.org
The Cortex-R52 implements the Configuration Base Address Register
(CBAR), as a read-only register. Add ARM_FEATURE_CBAR_RO to this CPU
type, so that our implementation provides the register and the
associated qdev property.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240206132931.38376-3-peter.maydell@linaro.org
| target/arm/tcg/cpu32.c | diffblobblamehistory |