| commit | f7b9358e2cf12a5eb07f5f9301fdadc932f9ee03 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 17 Jun 2016 14:23:47 +0000 (17 15:23 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 17 Jun 2016 14:23:51 +0000 (17 15:23 +0100) | ||
| tree | 42c5a2e58e616f9e0ccbf12ea85770162eb38f28 | treesnapshot (tar.gz zip) |
| parent | 359fbe65e01e13f582d3b9103e7c3ec5ac367a18 | commitdiff |
hw/intc/arm_gicv3: Implement gicv3_cpuif_update()
Implement the gicv3_cpuif_update() function which deals with correctly
asserting IRQ and FIQ based on the current running priority of the CPU,
the priority of the highest priority pending interrupt and the CPU's
current exception level and security state.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-17-git-send-email-peter.maydell@linaro.org
Implement the gicv3_cpuif_update() function which deals with correctly
asserting IRQ and FIQ based on the current running priority of the CPU,
the priority of the highest priority pending interrupt and the CPU's
current exception level and security state.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-17-git-send-email-peter.maydell@linaro.org
| hw/intc/arm_gicv3_cpuif.c | diffblobblamehistory | |
| hw/intc/gicv3_internal.h | diffblobblamehistory | |
| trace-events | diffblobblamehistory |