target/arm: Track the state of our irq lines from the GIC explicitly
commited89f078ff3d6684ce3e538e4777a3bb4ec3e2b1
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 13 Nov 2018 10:47:59 +0000 (13 10:47 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 13 Nov 2018 10:47:59 +0000 (13 10:47 +0000)
treed456f2c7e48302f544450e09e90a18c0dc55c215
parentc624ea0fa7ffc9e2cc3e2b36c92b5c960954489f
target/arm: Track the state of our irq lines from the GIC explicitly

Currently we track the state of the four irq lines from the GIC
only via the cs->interrupt_request or KVM irq state. That means
that we assume that an interrupt is asserted if and only if the
external line is set. This assumption is incorrect for VIRQ
and VFIQ, because the HCR_EL2.{VI,VF} bits allow assertion
of VIRQ and VFIQ separately from the state of the external line.

To handle this, start tracking the state of the external lines
explicitly in a CPU state struct field, as is common practice
for devices.

The complicated part of this is dealing with inbound migration
from an older QEMU which didn't have this state. We assume in
that case that the older QEMU did not implement the HCR_EL2.{VI,VF}
bits as generating interrupts, and so the line state matches
the current state in cs->interrupt_request. (This is not quite
true between commit 8a0fc3a29fc2315325400c7 and its revert, but
that commit is broken and never made it into any released QEMU
version.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20181109134731.11605-3-peter.maydell@linaro.org
target/arm/cpu.c
target/arm/cpu.h
target/arm/machine.c