| commit | ead4cf04f855575c24e795d7179d93b1601575b7 | |
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | |
| Sat, 22 Feb 2014 22:54:53 +0000 (22 22:54 +0000) | ||
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | |
| Thu, 27 Feb 2014 10:01:41 +0000 (27 10:01 +0000) | ||
| tree | fac4a9f3bffd41359466f37498aef255c51594e3 | treesnapshot (tar.gz zip) |
| parent | f9681f116ce06612b12ef41d8637f6659255ec98 | commitdiff |
sun4m: fix slavio timer RUN/STOP bit
The sun4m architecture has one 'system' timer and one timer per CPU.
The CPU timers can be configured in two modes:
* 22 bits Counter/Timer. Periodic interrupts.
* 54 bits User timer. For profiling. In this mode, the Run/Stop bit
controls the timer.
The run/stop bit controls the timer only when it is in "User" mode, but
its state shall be persistent.
Signed-off-by: Olivier Danet <odanet@caramail.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
The sun4m architecture has one 'system' timer and one timer per CPU.
The CPU timers can be configured in two modes:
* 22 bits Counter/Timer. Periodic interrupts.
* 54 bits User timer. For profiling. In this mode, the Run/Stop bit
controls the timer.
The run/stop bit controls the timer only when it is in "User" mode, but
its state shall be persistent.
Signed-off-by: Olivier Danet <odanet@caramail.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
| hw/timer/slavio_timer.c | diffblobblamehistory |