openpic: lower interrupt when reading the MSI register
commite99fd8af63a1692a1159cba8fa4943f2589adf97
authorScott Wood <scottwood@freescale.com>
Fri, 21 Dec 2012 16:15:39 +0000 (21 16:15 +0000)
committerAlexander Graf <agraf@suse.de>
Mon, 7 Jan 2013 16:37:09 +0000 (7 17:37 +0100)
treefc761e23735e982c7c6062355e188f395f8dd8b2
parent4c4f0e4801ac79632d03867c88aafc90b4ce503c
openpic: lower interrupt when reading the MSI register

This will stop things from breaking once it's properly treated as a
level-triggered interrupt.  Note that it's the MPIC's MSI cascade
interrupts that are level-triggered; the individual MSIs are
edge-triggered.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
hw/openpic.c