target-arm: Implement AArch64 ID and feature registers
commite60cef860f76cd558ee70e1d145eea1c24de20e7
authorPeter Maydell <peter.maydell@linaro.org>
Wed, 26 Feb 2014 17:20:05 +0000 (26 17:20 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 26 Feb 2014 17:20:05 +0000 (26 17:20 +0000)
tree2c8f31f19db06b82dc26bc6a1cf17f461ff6e5a1
parenta7adc4b779d24e75d05d43fb6311ab9e6449523a
target-arm: Implement AArch64 ID and feature registers

Implement the AArch64-specific ID and feature registers. Although
many of these are currently not used by the architecture (and so
always zero for all implementations), we define the full set of
fields in the ARMCPU struct for symmetry.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
target-arm/cpu-qom.h
target-arm/helper.c