| commit | ddd5140b1a0ffca777bb6e845912bc0d700f1f80 | |
| author | Aaron Larson <alarson@ddci.com> | |
| Mon, 5 Jun 2017 17:22:53 +0000 (5 10:22 -0700) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Fri, 30 Jun 2017 04:03:32 +0000 (30 14:03 +1000) | ||
| tree | e61ee5c8a7fd43adcdeaabf29d21d20c25a9bc17 | treesnapshot (tar.gz zip) |
| parent | aca8bf9f1cbc90da82554c43ef843887ed0ab1ff | commitdiff |
target-ppc: Enable open-pic timers to count and generate interrupts
Previously QEMU open-pic implemented the 4 open-pic timers including
all timer registers, but the timers did not "count" or generate any
interrupts. The patch makes the timers both count and generate
interrupts. The timer clock frequency is fixed at 25MHZ.
--
Responding to V2 patch comments.
- Simplify clock frequency logic and commentary.
- Remove camelCase variables.
- Timer objects now created at init rather than lazily.
Signed-off-by: Aaron Larson <alarson@ddci.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Previously QEMU open-pic implemented the 4 open-pic timers including
all timer registers, but the timers did not "count" or generate any
interrupts. The patch makes the timers both count and generate
interrupts. The timer clock frequency is fixed at 25MHZ.
--
Responding to V2 patch comments.
- Simplify clock frequency logic and commentary.
- Remove camelCase variables.
- Timer objects now created at init rather than lazily.
Signed-off-by: Aaron Larson <alarson@ddci.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| hw/intc/openpic.c | diffblobblamehistory |