| commit | dd5d693ecf5aa97f50ece9862b2a4cbe67b7c71b | |
| author | Seth Kintigh <skintigh@gmail.com> | |
| Mon, 19 Nov 2018 15:29:08 +0000 (19 15:29 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 19 Nov 2018 15:29:08 +0000 (19 15:29 +0000) | ||
| tree | 0280fc2fb2f5a49f12931597633a94415376212e | treesnapshot (tar.gz zip) |
| parent | 95a5db3ae5698b49c63144610ad02913e780c828 | commitdiff |
hw/arm/stm32f205: Fix the UART and Timer region size
The UART and timer devices for the stm32f205 were being created
with memory regions that were too large. Use the size specified
in the chip datasheet.
The old sizes were so large that the devices would overlap with
each other in the SoC memory map, so this fixes a bug that
caused odd behavior and/or crashes when trying to set up multiple
UARTs.
Signed-off-by: Seth Kintigh <skintigh@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: rephrased commit message to follow our usual standard]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The UART and timer devices for the stm32f205 were being created
with memory regions that were too large. Use the size specified
in the chip datasheet.
The old sizes were so large that the devices would overlap with
each other in the SoC memory map, so this fixes a bug that
caused odd behavior and/or crashes when trying to set up multiple
UARTs.
Signed-off-by: Seth Kintigh <skintigh@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: rephrased commit message to follow our usual standard]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/char/stm32f2xx_usart.c | diffblobblamehistory | |
| hw/timer/stm32f2xx_timer.c | diffblobblamehistory |