| commit | dbcabeeb54e9101307cf6225b9311a3ceaab7d1a | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Mon, 17 Oct 2016 18:22:16 +0000 (17 19:22 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 17 Oct 2016 18:22:16 +0000 (17 19:22 +0100) | ||
| tree | 532ee328e593b94415721ecbaa02730b966ddb47 | treesnapshot (tar.gz zip) |
| parent | dcb834447f7b22b08a918e2266e5751035fbfc83 | commitdiff |
aspeed: extend the number of host SPI controllers
The AST2500 SoC has two. Let's prepare ground for the next changes
which will add the required definitions for the second host SPI
controller.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1474977462-28032-4-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The AST2500 SoC has two. Let's prepare ground for the next changes
which will add the required definitions for the second host SPI
controller.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1474977462-28032-4-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/arm/aspeed.c | diffblobblamehistory | |
| hw/arm/aspeed_soc.c | diffblobblamehistory | |
| include/hw/arm/aspeed_soc.h | diffblobblamehistory |