target/arm: Update sve reduction vs simd_desc
commitc648c9b7e1ccff94b51ecbebe86a206952c47e75
authorRichard Henderson <richard.henderson@linaro.org>
Tue, 9 Mar 2021 15:53:05 +0000 (9 07:53 -0800)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 12 Mar 2021 12:40:10 +0000 (12 12:40 +0000)
treefe4d3fce97e400c078fd42188453d25860d4e3ce
parente610906c56f98c76888d45beb7f579935dd61a70
target/arm: Update sve reduction vs simd_desc

With the reduction operations, we intentionally increase maxsz to
the next power of 2, so as to fill out the reduction tree correctly.
Since e2e7168a214b, oprsz must equal maxsz, with exceptions for small
vectors, so this triggers an assertion for vector sizes > 32 that are
not themselves a power of 2.

Pass the power-of-two value in the simd_data field instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210309155305.11301-9-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/sve_helper.c
target/arm/translate-sve.c