target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness
commitabe66294e1d4899b312c296e93abcd3b88f2492e
authorRichard Henderson <richard.henderson@linaro.org>
Mon, 19 Apr 2021 20:22:40 +0000 (19 13:22 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 30 Apr 2021 10:16:50 +0000 (30 11:16 +0100)
tree28c043818e8e50172fadd023f3fd9220eebc530a
parent9565ac4cc7e1d1aaccf3d8c6aed423b776e7995f
target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness

Adjust the interface to match what has been done to the
TCGv_i32 load/store functions.

This is less obvious, because at present the only user of
these functions, trans_VLDST_multiple, also wants to manipulate
the endianness to speed up loading multiple bytes.  Thus we
retain an "internal" interface which is identical to the
current gen_aa32_{ld,st}_i64 interface.

The "new" interface will gain users as we remove the legacy
interfaces, gen_aa32_ld64 and gen_aa32_st64.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210419202257.161730-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/translate-neon.c.inc
target/arm/translate.c