| commit | a0d805f035ff7132949a4a7e82d7742c243927ed | |
| author | Weiwei Li <liweiwei@iscas.ac.cn> | |
| Wed, 15 Feb 2023 02:05:27 +0000 (15 10:05 +0800) | ||
| committer | Palmer Dabbelt <palmer@rivosinc.com> | |
| Wed, 1 Mar 2023 22:57:23 +0000 (1 14:57 -0800) | ||
| tree | a6a5035584940d8e5218d908d6b5be5a698ea39c | treesnapshot (tar.gz zip) |
| parent | 1d2cb5a8689f6c087b297723179676132d1cab32 | commitdiff |
target/riscv: Fix the relationship between Zhinxmin and Zhinx
Just like zfh and zfhmin, Zhinxmin is part of Zhinx so Zhinxmin
will be enabled when Zhinx is enabled.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230215020539.4788-3-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Just like zfh and zfhmin, Zhinxmin is part of Zhinx so Zhinxmin
will be enabled when Zhinx is enabled.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230215020539.4788-3-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| target/riscv/cpu.c | diffblobblamehistory |