target/mips: introduce Cavium Octeon CPU model
commit9a6046a655626b146b619baec5b39cb3d6e28221
authorPavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
Mon, 20 Jun 2022 12:05:37 +0000 (20 15:05 +0300)
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>
Tue, 12 Jul 2022 20:30:26 +0000 (12 22:30 +0200)
tree26fa653ec9b08ab5998e49581bc92d98b9f36518
parentdadd071a9c3f4de71e89e0db8becf40603265fe8
target/mips: introduce Cavium Octeon CPU model

This patch adds Cavium Octeon 68XX vCPU which provides
Octeon-specific instructions.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <165572673785.167724.7604881144978983510.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
target/mips/cpu-defs.c.inc