| commit | 8a0fc3a29fc2315325400c738f807d0d4ae0ab7f | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Wed, 24 Oct 2018 06:50:17 +0000 (24 07:50 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Wed, 24 Oct 2018 06:51:36 +0000 (24 07:51 +0100) | ||
| tree | 89df83c0a98a8b83bb0f994e6fcc0cd704d43004 | treesnapshot (tar.gz zip) |
| parent | 636540e9c40bd0931ef3022cb953bb7dbecd74ed | commitdiff |
target/arm: Implement HCR.VI and VF
The HCR_EL2 VI and VF bits are supposed to track whether there is
a pending virtual IRQ or virtual FIQ. For QEMU we store the
pending VIRQ/VFIQ status in cs->interrupt_request, so this means:
* if the register is read we must get these bit values from
cs->interrupt_request
* if the register is written then we must write the bit
values back into cs->interrupt_request
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181012144235.19646-7-peter.maydell@linaro.org
The HCR_EL2 VI and VF bits are supposed to track whether there is
a pending virtual IRQ or virtual FIQ. For QEMU we store the
pending VIRQ/VFIQ status in cs->interrupt_request, so this means:
* if the register is read we must get these bit values from
cs->interrupt_request
* if the register is written then we must write the bit
values back into cs->interrupt_request
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181012144235.19646-7-peter.maydell@linaro.org
| target/arm/helper.c | diffblobblamehistory |