| commit | 89fca22f212bd9000e9b481bd70dceb8df2a17a0 | |
| author | KONRAD Frederic <frederic.konrad@adacore.com> | |
| Tue, 1 Aug 2017 08:44:57 +0000 (1 10:44 +0200) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Wed, 9 Aug 2017 01:46:44 +0000 (9 11:46 +1000) | ||
| tree | 0fb2e7718b271bf7cf4880049d7a880966fc2470 | treesnapshot (tar.gz zip) |
| parent | 54affb3a3623b1d36c95e34faa722a5831323a74 | commitdiff |
booke206: fix MAS update on tlb miss
When a tlb instruction miss happen, rw is set to 0 at the bottom
of cpu_ppc_handle_mmu_fault which cause the MAS update function to miss
the SAS and TS bit in MAS6, MAS1 in booke206_update_mas_tlb_miss.
Just calling booke206_update_mas_tlb_miss with rw = 2 solve the issue.
Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
When a tlb instruction miss happen, rw is set to 0 at the bottom
of cpu_ppc_handle_mmu_fault which cause the MAS update function to miss
the SAS and TS bit in MAS6, MAS1 in booke206_update_mas_tlb_miss.
Just calling booke206_update_mas_tlb_miss with rw = 2 solve the issue.
Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| target/ppc/mmu_helper.c | diffblobblamehistory |