| commit | 76eff04d166b8fe747adbe82de8b7e060e668ff9 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 9 Oct 2017 13:48:39 +0000 (9 14:48 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 12 Oct 2017 12:23:14 +0000 (12 13:23 +0100) | ||
| tree | ed744634fa6e695f1595ab8beec13568f0af6bfb | treesnapshot (tar.gz zip) |
| parent | dcf14dfb704519846f396a376339ebdb93eaf049 | commitdiff |
target/arm: Implement SG instruction corner cases
The common situation of the SG instruction is that it is
executed from S&NSC memory by a CPU in NS state. That case
is handled by v7m_handle_execute_nsc(). However the instruction
also has defined behaviour in a couple of other cases:
* SG instruction in NS memory (behaves as a NOP)
* SG in S memory but CPU already secure (clears IT bits and
does nothing else)
* SG instruction in v8M without Security Extension (NOP)
These can be implemented in translate.c.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1507556919-24992-10-git-send-email-peter.maydell@linaro.org
The common situation of the SG instruction is that it is
executed from S&NSC memory by a CPU in NS state. That case
is handled by v7m_handle_execute_nsc(). However the instruction
also has defined behaviour in a couple of other cases:
* SG instruction in NS memory (behaves as a NOP)
* SG in S memory but CPU already secure (clears IT bits and
does nothing else)
* SG instruction in v8M without Security Extension (NOP)
These can be implemented in translate.c.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1507556919-24992-10-git-send-email-peter.maydell@linaro.org
| target/arm/translate.c | diffblobblamehistory |