| commit | 5c03990665aa9095e4d2734c8ca0f936a8e8f000 | |
| author | Lluís Vilanova <vilanova@ac.upc.edu> | |
| Fri, 14 Jul 2017 09:10:04 +0000 (14 12:10 +0300) | ||
| committer | Richard Henderson <richard.henderson@linaro.org> | |
| Wed, 6 Sep 2017 15:06:47 +0000 (6 08:06 -0700) | ||
| tree | a4fc0bcbd7dc75aba3463eb4dd4c043e81a3f298 | treesnapshot (tar.gz zip) |
| parent | 1d8a5535238fc5976e0542a413f4ad88f5d4b233 | commitdiff |
target/arm: [tcg,a64] Port to init_disas_context
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Alex Benneé <alex.benee@linaro.org>
Message-Id: <150002340430.22386.10889954302345646107.stgit@frigg.lan>
[rth: Adjust for max_insns interface change.]
Signed-off-by: Richard Henderson <rth@twiddle.net>
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Alex Benneé <alex.benee@linaro.org>
Message-Id: <150002340430.22386.10889954302345646107.stgit@frigg.lan>
[rth: Adjust for max_insns interface change.]
Signed-off-by: Richard Henderson <rth@twiddle.net>
| target/arm/translate-a64.c | diffblobblamehistory |