| commit | 4add0da64942d83e0564147c0876b01074bde9cb | |
| author | Halil Pasic <pasic@linux.vnet.ibm.com> | |
| Tue, 25 Jul 2017 22:44:42 +0000 (26 00:44 +0200) | ||
| committer | Cornelia Huck <cohuck@redhat.com> | |
| Fri, 28 Jul 2017 08:06:25 +0000 (28 10:06 +0200) | ||
| tree | f24a3558b915fdae78a9bb322e98fb4be426b710 | treesnapshot (tar.gz zip) |
| parent | 198c0d1f9df8c429502cb744fc26b6ba6e71db74 | commitdiff |
s390x/css: fix bits must be zero check for TIC
According to the PoP bit positions 0-3 and 8-32 of the format-1 CCW must
contain zeros. Bits 0-3 are already covered by cmd_code validity
checking, and bit 32 is covered by the CCW address checking.
Bits 8-31 correspond to CCW1.flags and CCW1.count. Currently we only
check for the absence of certain flags. Let's fix this.
Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20170725224442.13383-3-pasic@linux.vnet.ibm.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
[CH: tweaked comment]
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
According to the PoP bit positions 0-3 and 8-32 of the format-1 CCW must
contain zeros. Bits 0-3 are already covered by cmd_code validity
checking, and bit 32 is covered by the CCW address checking.
Bits 8-31 correspond to CCW1.flags and CCW1.count. Currently we only
check for the absence of certain flags. Let's fix this.
Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20170725224442.13383-3-pasic@linux.vnet.ibm.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
[CH: tweaked comment]
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| hw/s390x/css.c | diffblobblamehistory |