Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging

Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging

accel/tcg: Replace target_ulong in some APIs
accel/tcg: Remove CONFIG_PROFILER
accel/tcg: Store some tlb flags in CPUTLBEntryFull
tcg: Issue memory barriers as required for the guest memory model
tcg: Fix temporary variable in tcg_gen_gvec_andcs

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* tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu: (22 commits)
  accel/tcg: Renumber TLB_DISCARD_WRITE
  accel/tcg: Move TLB_WATCHPOINT to TLB_SLOW_FLAGS_MASK
  accel/tcg: Store some tlb flags in CPUTLBEntryFull
  accel/tcg: Remove check_tcg_memory_orders_compatible
  tcg: Add host memory barriers to cpu_ldst.h interfaces
  tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
  target/microblaze: Define TCG_GUEST_DEFAULT_MO
  tcg: Fix temporary variable in tcg_gen_gvec_andcs
  accel/tcg: remove CONFIG_PROFILER
  tests/plugin: Remove duplicate insn log from libinsn.so
  softfloat: use QEMU_FLATTEN to avoid mistaken isra inlining
  cpu: Replace target_ulong with hwaddr in tb_invalidate_phys_addr()
  accel/tcg: Replace target_ulong with vaddr in translator_*()
  accel/tcg: Replace target_ulong with vaddr in *_mmu_lookup()
  accel: Replace target_ulong with vaddr in probe_*()
  accel/tcg: Widen pc to vaddr in CPUJumpCache
  accel/tcg/cpu-exec.c: Widen pc to vaddr
  accel/tcg/cputlb.c: Widen addr in MMULookupPageData
  accel/tcg/cputlb.c: Widen CPUTLBEntry access functions
  target: Widen pc/cs_base in cpu_get_tb_cpu_state
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>