target/riscv: rvv: Early exit when vstart >= vl
commit41d3d7f76aa7060c0cbc1c8b3a9767a5997b231a
authoreopXD <yueh.ting.chen@gmail.com>
Mon, 6 Jun 2022 06:16:16 +0000 (6 06:16 +0000)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 9 Jun 2022 23:31:42 +0000 (10 09:31 +1000)
tree4fd1c6e2afbacc4c096308a5fc44e0d969fa033a
parentc7b8a4213b0dba710e31d633e17e661151c3d23a
target/riscv: rvv: Early exit when vstart >= vl

According to v-spec (section 5.4):
When vstart ≥ vl, there are no body elements, and no elements are
updated in any destination vector register group, including that
no tail elements are updated with agnostic values.

vmsbf.m, vmsif.m, vmsof.m, viota.m, vcompress instructions themselves
require vstart to be zero. So they don't need the early exit.

Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <165449614532.19704.7000832880482980398-4@git.sr.ht>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/insn_trans/trans_rvv.c.inc