| commit | 3c43fc333be7747a29405bdf6b3bd9e82fa22164 | |
| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | |
| Mon, 24 Oct 2022 14:35:40 +0000 (24 15:35 +0100) | ||
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | |
| Mon, 31 Oct 2022 10:32:07 +0000 (31 11:32 +0100) | ||
| tree | bbfaa01111022cfdaed055ab1c5d44961e34213f | treesnapshot (tar.gz zip) |
| parent | d240d3fb14031ed2b00b86ab8e9082ba6bebce4d | commitdiff |
hw/mips/boston: Don't set link_up for xilinx-pcie
PCIe port 0 and 1 had link_up set as false previously,
that makes those two ports effectively useless. It can
be annoying for users to find that the device they plug
on those buses won't work at all.
As link_up is true by default, just don't set it again in
boston platform code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20221024143540.97545-1-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
PCIe port 0 and 1 had link_up set as false previously,
that makes those two ports effectively useless. It can
be annoying for users to find that the device they plug
on those buses won't work at all.
As link_up is true by default, just don't set it again in
boston platform code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20221024143540.97545-1-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| hw/mips/boston.c | diffblobblamehistory |