| commit | 35e07821ff99a7511cf2594bd14bbcf8e8b7a528 | |
| author | Yifei Jiang <jiangyifei@huawei.com> | |
| Mon, 26 Oct 2020 11:55:28 +0000 (26 19:55 +0800) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Tue, 3 Nov 2020 15:17:23 +0000 (3 07:17 -0800) | ||
| tree | c9b3d528140f13d3df359aa876b98293c3866711 | treesnapshot (tar.gz zip) |
| parent | 24beb03e46de8602b318d5f234ce0ba489a7dbfc | commitdiff |
target/riscv: Add H extension state description
In the case of supporting H extension, add H extension description
to vmstate_riscv_cpu.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201026115530.304-5-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
In the case of supporting H extension, add H extension description
to vmstate_riscv_cpu.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201026115530.304-5-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| target/riscv/machine.c | diffblobblamehistory |