| commit | 24ece072504b8c8b03861168d601d174a7948099 | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Sat, 22 Oct 2016 09:46:41 +0000 (22 11:46 +0200) | ||
| committer | David Gibson <david@gibson.dropbear.id.au> | |
| Thu, 27 Oct 2016 22:38:25 +0000 (28 09:38 +1100) | ||
| tree | 1863bdf931a1db9c8d424202c73f36bda248ffd9 | treesnapshot (tar.gz zip) |
| parent | 967b75230b9720ea2b3ae49f38f8287026125f9f | commitdiff |
ppc/pnv: add XSCOM handlers to PnvCore
Now that we are using real HW ids for the cores in PowerNV chips, we
can route the XSCOM accesses to them. We just need to attach a
specific XSCOM memory region to each core in the appropriate window
for the core number.
To start with, let's install the DTS (Digital Thermal Sensor) handlers
which should return 38°C for each core.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Now that we are using real HW ids for the cores in PowerNV chips, we
can route the XSCOM accesses to them. We just need to attach a
specific XSCOM memory region to each core in the appropriate window
for the core number.
To start with, let's install the DTS (Digital Thermal Sensor) handlers
which should return 38°C for each core.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| hw/ppc/pnv.c | diffblobblamehistory | |
| hw/ppc/pnv_core.c | diffblobblamehistory | |
| include/hw/ppc/pnv_core.h | diffblobblamehistory | |
| include/hw/ppc/pnv_xscom.h | diffblobblamehistory |