| commit | 227a8653669a8526dcef1020982628282f44820d | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 17 Jun 2016 14:23:48 +0000 (17 15:23 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 17 Jun 2016 14:23:51 +0000 (17 15:23 +0100) | ||
| tree | d9bd2ecaa4f7817f934e98056a7a770b35d6650a | treesnapshot (tar.gz zip) |
| parent | b1a0eb777d9304ad69c577d5fdd8e20e4bf5644f | commitdiff |
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
Add the CPU interface registers which deal with acknowledging
and dismissing interrupts.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-19-git-send-email-peter.maydell@linaro.org
Add the CPU interface registers which deal with acknowledging
and dismissing interrupts.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-19-git-send-email-peter.maydell@linaro.org
| hw/intc/arm_gicv3_cpuif.c | diffblobblamehistory | |
| hw/intc/gicv3_internal.h | diffblobblamehistory | |
| trace-events | diffblobblamehistory |