| commit | 1c77c410b684e987b8c3cd2e02e0460c7e008778 | |
| author | Michael Clark <mjc@sifive.com> | |
| Fri, 2 Mar 2018 12:31:12 +0000 (3 01:31 +1300) | ||
| committer | Michael Clark <mjc@sifive.com> | |
| Tue, 6 Mar 2018 19:30:28 +0000 (7 08:30 +1300) | ||
| tree | 8e783e11ffb965b480d3bf0dd747865da8f57ce4 | treesnapshot (tar.gz zip) |
| parent | 4b50b8d9f2bdc007d632a6d0781de1126c5d9c76 | commitdiff |
SiFive RISC-V CLINT Block
The CLINT (Core Local Interruptor) device provides real-time clock, timer
and interprocessor interrupts based on SiFive's CLINT specification.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Stefan O'Rear <sorear2@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
The CLINT (Core Local Interruptor) device provides real-time clock, timer
and interprocessor interrupts based on SiFive's CLINT specification.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Stefan O'Rear <sorear2@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
| hw/riscv/sifive_clint.c | [new file with mode: 0644] | blob |
| include/hw/riscv/sifive_clint.h | [new file with mode: 0644] | blob |